From: Sebastian Macke <sebastian@macke.de>
To: Max Filippov <jcmvbkbc@gmail.com>
Cc: openrisc@lists.openrisc.net, openrisc@lists.opencores.org,
"Alex Bennée" <alex.bennee@linaro.org>,
qemu-devel <qemu-devel@nongnu.org>,
"Ethan Hunt" <proljc@gmail.com>
Subject: Re: [Qemu-devel] [PATCH_v2 9/9] target-openrisc: Correct carry flagcheck of l.addc and l.addic test casess
Date: Tue, 22 Oct 2013 09:15:57 -0700 [thread overview]
Message-ID: <5266A4BD.2080701@macke.de> (raw)
In-Reply-To: <CAMo8Bf+_i7MpwksWbz81VowLnndwfdnP-u8Huq7HTNSdc3vNVA@mail.gmail.com>
On 22/10/2013 9:01 AM, Max Filippov wrote:
> On Tue, Oct 22, 2013 at 7:45 PM, Sebastian Macke <sebastian@macke.de> wrote:
>> Hi Alex,
>>
>> I am using a cross-compiling toolchain. It's the easiest way as I have to
>> compile the image for QEMU anyhow.
>> http://opencores.org/or1k/OpenRISC_GNU_tool_chain
>>
>> Then it's just an "make && make test" in the corresponding
>> tests/tcg/openrisc folder.
>>
>> Inside the virtual machine it would be a little bit more complicated. You
>> have to compile Linux with the initramfs containing the QEMU test sources.
>> Another storage device is currently not supported by the OpenRISC QEMU
>> emulator.
> It should be possible to use network, I did a quick check at the time of
> openrisc port submission, it used to work.
>
This is true. Via a network file system it should be no problem. But
this is a very complicated way to test the QEMU tcg part.
The image containing gcc I am currently using you can download under
www.simulationcorner.net/vmlinux
Run it with "qemu-system-or32 -m 128 -kernel vmlinux -nographic"
next prev parent reply other threads:[~2013-10-22 16:16 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-10-22 0:12 [Qemu-devel] [PATCH_v2 0/9] target-openrisc: Corrections and speed improvements Sebastian Macke
2013-10-22 0:12 ` [Qemu-devel] [PATCH_v2 1/9] target-openrisc: Speed up move instruction Sebastian Macke
2013-10-22 0:12 ` [Qemu-devel] [PATCH_v2 2/9] target-openrisc: Remove unnecessary code generated by jump instructions Sebastian Macke
2013-10-22 0:12 ` [Qemu-devel] [PATCH_v2 3/9] target-openrisc: Remove executable flag for every page Sebastian Macke
2013-10-22 0:12 ` [Qemu-devel] [PATCH_v2 4/9] target-openrisc: Correct wrong epcr register in interrupt handler Sebastian Macke
2013-10-22 0:12 ` [Qemu-devel] [PATCH_v2 5/9] openrisc-timer: Reduce overhead, Separate clock update functions Sebastian Macke
2013-10-22 0:12 ` [Qemu-devel] [PATCH_v2 6/9] target-openrisc: Correct memory bounds checking for the tlb buffers Sebastian Macke
2013-10-22 0:12 ` [Qemu-devel] [PATCH_v2 7/9] target-openrisc: Separate branch flag from Supervision register Sebastian Macke
2013-10-22 0:12 ` [Qemu-devel] [PATCH_v2 8/9] target-openrisc: Complete remove of npc and ppc variables Sebastian Macke
2013-10-22 0:12 ` [Qemu-devel] [PATCH_v2 9/9] target-openrisc: Correct carry flag check of l.addc and l.addic test cases Sebastian Macke
2013-10-22 8:35 ` [Qemu-devel] [PATCH_v2 9/9] target-openrisc: Correct carry flagcheck of l.addc and l.addic test casess Alex Bennée
2013-10-22 15:45 ` Sebastian Macke
2013-10-22 16:01 ` Max Filippov
2013-10-22 16:12 ` Alex Bennée
2013-10-22 16:15 ` Sebastian Macke [this message]
2013-10-23 6:52 ` Max Filippov
2013-10-23 3:47 ` [Qemu-devel] [PATCH_v2 0/9] target-openrisc: Corrections and speed improvements Jia Liu
2013-10-24 23:23 ` Sebastian Macke
2013-10-26 0:21 ` Jia Liu
2013-10-28 1:56 ` Sebastian Macke
2013-10-29 7:32 ` Jia Liu
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