From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58566) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Vbacg-0004EP-UD for qemu-devel@nongnu.org; Wed, 30 Oct 2013 14:36:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Vbaca-0008CN-Ub for qemu-devel@nongnu.org; Wed, 30 Oct 2013 14:36:06 -0400 Message-ID: <52714929.1050005@redhat.com> Date: Wed, 30 Oct 2013 19:00:09 +0100 From: Paolo Bonzini MIME-Version: 1.0 References: <52713936.9070309@redhat.com> In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] e1000 patch for osx List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: QEMU Developers , jacek burghardt , qemu-discuss Il 30/10/2013 18:29, Peter Maydell ha scritto: > This looks odd -- you seem to be modifying val but then not > using the modified value before we reach the end of the function. > >> > } >> > >> > static void >> > @@ -445,8 +450,9 @@ set_mdic(E1000State *s, int index, uint32_t val) >> > } else { >> > if (addr < NPHYWRITEOPS && phyreg_writeops[addr]) { >> > phyreg_writeops[addr](s, index, data); >> > + } else { >> > + s->phy_reg[addr] = data; >> > } >> > - s->phy_reg[addr] = data; >> > } > ...and this part seems to remove the code which sets > phy_reg[PHY_CTRL], so it will now always read back as zero. Yeah, I forgot one line: diff --git a/hw/net/e1000.c b/hw/net/e1000.c index 70a59fd..b7a1953 100644 --- a/hw/net/e1000.c +++ b/hw/net/e1000.c @@ -203,6 +203,12 @@ set_phy_ctrl(E1000State *s, int index, uint16_t val) DBGOUT(PHY, "Start link auto negotiation\n"); timer_mod(s->autoneg_timer, qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + 500); } + + if (val & 0x8000) { + val &= 0x7fff; + set_ics(s, 0, E1000_ICR_LSC); + } + s->phy_reg[PHY_CTRL] = val; } static void @@ -445,8 +451,9 @@ set_mdic(E1000State *s, int index, uint32_t val) } else { if (addr < NPHYWRITEOPS && phyreg_writeops[addr]) { phyreg_writeops[addr](s, index, data); + } else { + s->phy_reg[addr] = data; } - s->phy_reg[addr] = data; } } s->mac_reg[MDIC] = val | E1000_MDIC_READY; Paolo