diff for duplicates of <527B679D.8040602@gmail.com> diff --git a/a/1.txt b/N1/1.txt index d9d5268..59dcb76 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -41,7 +41,7 @@ On 11/07/13 06:48, Jisheng Zhang wrote: >> + #address-cells = <1>; >> + #size-cells = <0>; >> + ->> + cpu at 0 { +>> + cpu@0 { >> + compatible = "arm,cortex-a9"; >> + device_type = "cpu"; >> + next-level-cache = <&l2>; @@ -58,7 +58,7 @@ On 11/07/13 06:48, Jisheng Zhang wrote: >> + >> + ranges = <0 0xf7000000 0x1000000>; >> + ->> + l2: l2-cache-controller at ac0000 { +>> + l2: l2-cache-controller@ac0000 { >> + compatible = "arm,pl310-cache"; >> + reg = <0xac0000 0x1000>; >> + cache-unified; @@ -84,21 +84,21 @@ matrix and get a patch ready. >> + }; >> + ->> + gic: interrupt-controller at ad1000 { +>> + gic: interrupt-controller@ad1000 { >> + compatible = "arm,cortex-a9-gic"; >> + reg = <0xad1000 0x1000>, <0xad0100 0x0100>; >> + interrupt-controller; >> + #interrupt-cells = <3>; >> + }; >> + ->> + local-timer at ad0600 { +>> + local-timer@ad0600 { >> + compatible = "arm,cortex-a9-twd-timer"; >> + reg = <0xad0600 0x20>; >> + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>; >> + clocks = <&sysclk>; >> + }; >> + ->> + apb at e80000 { +>> + apb@e80000 { >> + compatible = "simple-bus"; >> + #address-cells = <1>; >> + #size-cells = <1>; @@ -106,7 +106,7 @@ matrix and get a patch ready. >> + ranges = <0 0xe80000 0x10000>; >> + interrupt-parent = <&aic>; >> + ->> + timer0: timer at 2c00 { +>> + timer0: timer@2c00 { >> + compatible = "snps,dw-apb-timer"; > snps,dw-apb-timer-osc? @@ -122,7 +122,7 @@ deprecated by [1]. >> + status = "okay"; >> + }; >> + ->> + timer1: timer at 2c14 { +>> + timer1: timer@2c14 { >> + compatible = "snps,dw-apb-timer"; > ditto for the remaining diff --git a/a/content_digest b/N1/content_digest index e99241d..ce5618d 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -2,10 +2,21 @@ "ref\01383661723-17956-1-git-send-email-sebastian.hesselbarth@gmail.com\0" "ref\01383661723-17956-9-git-send-email-sebastian.hesselbarth@gmail.com\0" "ref\020131107134802.2234bff1@xhacker\0" - "From\0sebastian.hesselbarth@gmail.com (Sebastian Hesselbarth)\0" - "Subject\0[PATCH v3 8/9] ARM: add Armada 1500-mini and Chromecast device tree files\0" + "From\0Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>\0" + "Subject\0Re: [PATCH v3 8/9] ARM: add Armada 1500-mini and Chromecast device tree files\0" "Date\0Thu, 07 Nov 2013 11:12:45 +0100\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Jisheng Zhang <jszhang@marvell.com>\0" + "Cc\0Mark Rutland <mark.rutland@arm.com>" + devicetree@vger.kernel.org <devicetree@vger.kernel.org> + Russell King <linux@arm.linux.org.uk> + Pawel Moll <pawel.moll@arm.com> + Ian Campbell <ijc+devicetree@hellion.org.uk> + Stephen Warren <swarren@wwwdotorg.org> + linux-doc@vger.kernel.org <linux-doc@vger.kernel.org> + linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org> + Rob Herring <rob.herring@calxeda.com> + Rob Landley <rob@landley.net> + " linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org>\0" "\00:1\0" "b\0" "On 11/07/13 06:48, Jisheng Zhang wrote:\n" @@ -51,7 +62,7 @@ ">> + #address-cells = <1>;\n" ">> + #size-cells = <0>;\n" ">> +\n" - ">> + cpu at 0 {\n" + ">> + cpu@0 {\n" ">> + compatible = \"arm,cortex-a9\";\n" ">> + device_type = \"cpu\";\n" ">> + next-level-cache = <&l2>;\n" @@ -68,7 +79,7 @@ ">> +\n" ">> + ranges = <0 0xf7000000 0x1000000>;\n" ">> +\n" - ">> + l2: l2-cache-controller at ac0000 {\n" + ">> + l2: l2-cache-controller@ac0000 {\n" ">> + compatible = \"arm,pl310-cache\";\n" ">> + reg = <0xac0000 0x1000>;\n" ">> + cache-unified;\n" @@ -94,21 +105,21 @@ "\n" ">> + };\n" ">> +\n" - ">> + gic: interrupt-controller at ad1000 {\n" + ">> + gic: interrupt-controller@ad1000 {\n" ">> + compatible = \"arm,cortex-a9-gic\";\n" ">> + reg = <0xad1000 0x1000>, <0xad0100 0x0100>;\n" ">> + interrupt-controller;\n" ">> + #interrupt-cells = <3>;\n" ">> + };\n" ">> +\n" - ">> + local-timer at ad0600 {\n" + ">> + local-timer@ad0600 {\n" ">> + compatible = \"arm,cortex-a9-twd-timer\";\n" ">> + reg = <0xad0600 0x20>;\n" ">> + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;\n" ">> + clocks = <&sysclk>;\n" ">> + };\n" ">> +\n" - ">> + apb at e80000 {\n" + ">> + apb@e80000 {\n" ">> + compatible = \"simple-bus\";\n" ">> + #address-cells = <1>;\n" ">> + #size-cells = <1>;\n" @@ -116,7 +127,7 @@ ">> + ranges = <0 0xe80000 0x10000>;\n" ">> + interrupt-parent = <&aic>;\n" ">> +\n" - ">> + timer0: timer at 2c00 {\n" + ">> + timer0: timer@2c00 {\n" ">> + compatible = \"snps,dw-apb-timer\";\n" "> snps,dw-apb-timer-osc?\n" "\n" @@ -132,7 +143,7 @@ ">> + status = \"okay\";\n" ">> + };\n" ">> +\n" - ">> + timer1: timer at 2c14 {\n" + ">> + timer1: timer@2c14 {\n" ">> + compatible = \"snps,dw-apb-timer\";\n" "> ditto for the remaining\n" "\n" @@ -140,4 +151,4 @@ "\n" Sebastian -ed2bd32dc24f0f3027807d6191f2e9ed73a63d5a790de805b68f6bef9329d221 +51dad1baa0e9694931da23e85ec20b11b41a5b7083b71429452915c9b4afae25
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