Re: [PATCH 3/6] MIPS: Add support for the proAptiv cores

[David Daney <ddaney.cavm@gmail.com>]

On 11/07/2013 09:08 AM, Markos Chandras wrote:
> From: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
>
> The proAptiv Multiprocessing System is a power efficient multi-core
> microprocessor for use in system-on-chip (SoC) applications.
> The proAptiv Multiprocessing System combines a deep pipeline
> with multi-issue out of order execution for improved computational
> throughput. The proAptiv Multiprocessing System can contain one to
> six MIPS32r3 proAptiv cores, system level coherence
> manager with L2 cache, optional coherent I/O port, and optional
> floating point unit.
>
> Reviewed-by: Paul Burton <paul.burton@imgtec.com>
> Reviewed-by: James Hogan <james.hogan@imgtec.com>
> Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>


This patch is a big collection of small unrelated changes.

Can you break it up so that there is one patch per change?

o Add new identifiers
o Probe for them.
o Add new cpu-features.
o tlb.h change.
o All the places you add 'case CPU_PROAPTIV'

Plus...
> ---
>   arch/mips/include/asm/cpu-features.h |  3 +++
>   arch/mips/include/asm/cpu-type.h     |  1 +
>   arch/mips/include/asm/cpu.h          |  5 ++++-
>   arch/mips/include/asm/tlb.h          |  4 +++-
>   arch/mips/kernel/cpu-probe.c         | 15 +++++++++++++++
>   arch/mips/kernel/idle.c              |  1 +
>   arch/mips/kernel/spram.c             |  1 +
>   arch/mips/kernel/traps.c             |  1 +
>   arch/mips/mm/c-r4k.c                 |  1 +
>   arch/mips/mm/sc-mips.c               |  1 +
>   arch/mips/mm/tlbex.c                 |  1 +
>   arch/mips/oprofile/op_model_mipsxx.c |  4 ++++
>   12 files changed, 36 insertions(+), 2 deletions(-)
>
[...]
> diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
> index c814287..8168e29 100644
> --- a/arch/mips/kernel/cpu-probe.c
> +++ b/arch/mips/kernel/cpu-probe.c
> @@ -286,6 +286,13 @@ static inline unsigned int decode_config4(struct cpuinfo_mips *c)
>   	    && cpu_has_tlb)
>   		c->tlbsize += (config4 & MIPS_CONF4_MMUSIZEEXT) * 0x40;
>
> +	if (cpu_has_tlb) {
> +		if (((config4 & MIPS_CONF4_IE) >> 29) == 2) {
> +			c->options |= MIPS_CPU_TLBINV;
> +			pr_info("TLBINV/F supported, config4=0x%0x\n", config4);

... The probing functions don't print messages, so don't add this pr_info().


> +		}
> +	}
> +