From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrzej Hajda Subject: Re: [PATCH v3 1/7] drm: Add DSI bus infrastructure Date: Tue, 12 Nov 2013 15:14:22 +0100 Message-ID: <528237BE.8020501@samsung.com> References: <1384171235-2498-1-git-send-email-treding@nvidia.com> <1384171235-2498-2-git-send-email-treding@nvidia.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mailout4.w1.samsung.com (mailout4.w1.samsung.com [210.118.77.14]) by gabe.freedesktop.org (Postfix) with ESMTP id 54295FA3FB for ; Tue, 12 Nov 2013 06:14:27 -0800 (PST) Received: from eucpsbgm1.samsung.com (unknown [203.254.199.244]) by mailout4.w1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MW500JM8M7DLC20@mailout4.w1.samsung.com> for dri-devel@lists.freedesktop.org; Tue, 12 Nov 2013 14:14:24 +0000 (GMT) In-reply-to: <1384171235-2498-2-git-send-email-treding@nvidia.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: dri-devel-bounces@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org To: Thierry Reding , dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org Hi Thierry, I have already sent patch with DSI bus implementation [1]. It was posted as the first step of CDF implementation attempt, but in fact it do not depend on CDF. [1] http://www.mail-archive.com/dri-devel@lists.freedesktop.org/msg45252.html One comment below. On 11/11/2013 01:00 PM, Thierry Reding wrote: > In order to support DSI peripherals, add a DSI bus type that devices and > drivers can be registered with. > > Signed-off-by: Thierry Reding > --- [snip] > + > +/* > + * DSI packet data types > + */ > + > +/* processor-sourced packets */ > +#define DSI_CMD_VSYNC_START 0x01 > +#define DSI_CMD_VSYNC_END 0x11 > +#define DSI_CMD_HSYNC_START 0x21 > +#define DSI_CMD_HSYNC_END 0x31 > +#define DSI_CMD_EOT 0x08 > +#define DSI_CMD_COLOR_MODE_OFF 0x02 > +#define DSI_CMD_COLOR_MODE_ON 0x12 > +#define DSI_CMD_SHUT_DOWN 0x22 > +#define DSI_CMD_TURN_ON 0x32 > +#define DSI_CMD_GEN_SHORT_WRITE_0 0x03 > +#define DSI_CMD_GEN_SHORT_WRITE_1 0x13 > +#define DSI_CMD_GEN_SHORT_WRITE_2 0x23 > +#define DSI_CMD_GEN_SHORT_READ_0 0x04 > +#define DSI_CMD_GEN_SHORT_READ_1 0x14 > +#define DSI_CMD_GEN_SHORT_READ_2 0x24 > +#define DSI_CMD_DCS_SHORT_WRITE_0 0x05 > +#define DSI_CMD_DCS_SHORT_WRITE_1 0x15 > +#define DSI_CMD_DCS_SHORT_READ 0x06 > +#define DSI_CMD_SET_MAX_RETURN_PACKET_SIZE 0x37 > +#define DSI_CMD_NULL 0x09 > +#define DSI_CMD_BLANK 0x19 > +#define DSI_CMD_GEN_LONG_WRITE 0x29 > +#define DSI_CMD_DCS_LONG_WRITE 0x39 > +#define DSI_CMD_YCbCr422_20 0x0c > +#define DSI_CMD_YCbCr422_24 0x1c > +#define DSI_CMD_YCbCr422_16 0x2c > +#define DSI_CMD_RGB30 0x0d > +#define DSI_CMD_RGB36 0x1d > +#define DSI_CMD_YCbCr420 0x3d > +#define DSI_CMD_RGB16 0x0e > +#define DSI_CMD_RGB18 0x1e > +#define DSI_CMD_RGB18NP 0x2e > +#define DSI_CMD_RGB24 0x3e > + > +/* peripheral-sourced */ > +#define DSI_RSP_ACK_ERR 0x02 > +#define DSI_RSP_EOT 0x08 > +#define DSI_RSP_GEN_SHORT_READ_1 0x11 > +#define DSI_RSP_GEN_SHORT_READ_2 0x12 > +#define DSI_RSP_GEN_LONG_READ 0x1a > +#define DSI_RSP_DCS_LONG_READ 0x1c > +#define DSI_RSP_DCS_SHORT_READ_1 0x21 > +#define DSI_RSP_DCS_SHORT_READ_2 0x22 > + Those macros are already defined in include/video/mipi_display.h Regards Andrzej