From: Richard Henderson <rth@twiddle.net>
To: Claudio Fontana <claudio.fontana@linaro.org>,
Peter Maydell <peter.maydell@linaro.org>
Cc: "Alexander Graf" <agraf@suse.de>, "Alex Bennée" <alex@bennee.com>,
qemu-devel@nongnu.org, "Michael Matz" <matz@suse.de>,
patches@linaro.org
Subject: Re: [Qemu-devel] [RFC v2] target-arm: provide skeleton for a64 insn decoding
Date: Wed, 13 Nov 2013 04:29:41 +1000 [thread overview]
Message-ID: <52827395.5050207@twiddle.net> (raw)
In-Reply-To: <1384262987-3972-1-git-send-email-claudio.fontana@linaro.org>
On 11/12/2013 11:29 PM, Claudio Fontana wrote:
> provide a skeleton for a64 instruction decoding in translate-a64.c,
> by dividing instructions into the classes defined by the
> ARM Architecture Reference Manual(DDI0487A_a) C3
>
> Signed-off-by: Claudio Fontana <claudio.fontana@linaro.org>
> Signed-off-by: Alex Bennée <alex@bennee.com>
> Reviewed-by: Alex Bennée <alex@bennee.com>
> ---
> target-arm/translate-a64.c | 368 ++++++++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 360 insertions(+), 8 deletions(-)
>
> For the rationale, see v1 of the RFC at
> http://lists.gnu.org/archive/html/qemu-devel/2013-11/msg01312.html
Reviewed-by: Richard Henderson <rth@twiddle.net>
r~
next prev parent reply other threads:[~2013-11-12 18:30 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-11-12 13:29 [Qemu-devel] [RFC v2] target-arm: provide skeleton for a64 insn decoding Claudio Fontana
2013-11-12 18:29 ` Richard Henderson [this message]
2013-11-13 13:38 ` Laurent Desnogues
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