From mboxrd@z Thu Jan 1 00:00:00 1970 From: Santosh Shilimkar Subject: Re: [PATCH V3 7/7] ARM: DRA: Enable Crossbar IP support for DRA7XX Date: Wed, 13 Nov 2013 11:04:46 -0500 Message-ID: <5283A31E.4070302@ti.com> References: <1383657257-3458-1-git-send-email-r.sricharan@ti.com> <1383657257-3458-8-git-send-email-r.sricharan@ti.com> <5281BF70.4050708@ti.com> <5281C0E9.8020104@ti.com> <52839B9C.8090707@ti.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <52839B9C.8090707@ti.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Nishanth Menon Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, linux@arm.linux.org.uk, linux-doc@vger.kernel.org, tony@atomide.com, linus.walleij@linaro.org, Rajendra Nayak , linux-kernel@vger.kernel.org, Sricharan R , galak@codeaurora.org, marc.zyngier@arm.com, tglx@linutronix.de, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, grant.likely@linaro.org List-Id: linux-omap@vger.kernel.org On Wednesday 13 November 2013 10:32 AM, Nishanth Menon wrote: > On 11/11/2013 11:47 PM, Sricharan R wrote: [..] > > Rationale - with more TI SoCs trending towards crossbar, we dont need > to keep adding to the soc_is checks, further, we intend to remove > soc_is checks in it's entirety.. > Just for record, and thats what am pushing the TI hardware folks is not to build default IRQ configuration considering the software will clean-up the mess. So hope is that we don't have to use this infrastructure always but only for exceptional cases. Regards, Santosh From mboxrd@z Thu Jan 1 00:00:00 1970 From: santosh.shilimkar@ti.com (Santosh Shilimkar) Date: Wed, 13 Nov 2013 11:04:46 -0500 Subject: [PATCH V3 7/7] ARM: DRA: Enable Crossbar IP support for DRA7XX In-Reply-To: <52839B9C.8090707@ti.com> References: <1383657257-3458-1-git-send-email-r.sricharan@ti.com> <1383657257-3458-8-git-send-email-r.sricharan@ti.com> <5281BF70.4050708@ti.com> <5281C0E9.8020104@ti.com> <52839B9C.8090707@ti.com> Message-ID: <5283A31E.4070302@ti.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Wednesday 13 November 2013 10:32 AM, Nishanth Menon wrote: > On 11/11/2013 11:47 PM, Sricharan R wrote: [..] > > Rationale - with more TI SoCs trending towards crossbar, we dont need > to keep adding to the soc_is checks, further, we intend to remove > soc_is checks in it's entirety.. > Just for record, and thats what am pushing the TI hardware folks is not to build default IRQ configuration considering the software will clean-up the mess. So hope is that we don't have to use this infrastructure always but only for exceptional cases. Regards, Santosh From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756997Ab3KMQFg (ORCPT ); Wed, 13 Nov 2013 11:05:36 -0500 Received: from arroyo.ext.ti.com ([192.94.94.40]:48758 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751254Ab3KMQFb (ORCPT ); Wed, 13 Nov 2013 11:05:31 -0500 Message-ID: <5283A31E.4070302@ti.com> Date: Wed, 13 Nov 2013 11:04:46 -0500 From: Santosh Shilimkar User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/17.0 Thunderbird/17.0 MIME-Version: 1.0 To: Nishanth Menon CC: Sricharan R , Rajendra Nayak , , , , , , , , , , , , , , Subject: Re: [PATCH V3 7/7] ARM: DRA: Enable Crossbar IP support for DRA7XX References: <1383657257-3458-1-git-send-email-r.sricharan@ti.com> <1383657257-3458-8-git-send-email-r.sricharan@ti.com> <5281BF70.4050708@ti.com> <5281C0E9.8020104@ti.com> <52839B9C.8090707@ti.com> In-Reply-To: <52839B9C.8090707@ti.com> Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wednesday 13 November 2013 10:32 AM, Nishanth Menon wrote: > On 11/11/2013 11:47 PM, Sricharan R wrote: [..] > > Rationale - with more TI SoCs trending towards crossbar, we dont need > to keep adding to the soc_is checks, further, we intend to remove > soc_is checks in it's entirety.. > Just for record, and thats what am pushing the TI hardware folks is not to build default IRQ configuration considering the software will clean-up the mess. So hope is that we don't have to use this infrastructure always but only for exceptional cases. Regards, Santosh