From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56889) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VhGBI-0003pA-I9 for qemu-devel@nongnu.org; Fri, 15 Nov 2013 04:59:22 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VhGBC-00061L-JL for qemu-devel@nongnu.org; Fri, 15 Nov 2013 04:59:16 -0500 Message-ID: <5285F066.2030404@imgtec.com> Date: Fri, 15 Nov 2013 09:59:02 +0000 From: James Hogan MIME-Version: 1.0 References: <20131107161330.GB31594@smtp.vpn> In-Reply-To: Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] Does QEMU support MIPS SMP2 malta board? List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Nancy Cc: "Edgar E. Iglesias" , qemu-devel@nongnu.org, qemu-discuss@nongnu.org Hi Nancy, On 15/11/13 09:48, Nancy wrote: > I notes the smp based on kvm implement, but there do not have kvm > implement under target-mips? how this smp implement? Is there any > document record the QEMU MIPS smp internal? The KVM patchset added a binary blob of the CPS bootloader to support multicore: https://patchwork.kernel.org/patch/2207161/ I believe it's related to the fact that on most real hardware the reset vectors of the cores aren't controllable so they all start in the boot PROM, therefore you need some code there to put the other cores in a loop waiting to be told to go somewhere by the OS. Cheers James