From mboxrd@z Thu Jan  1 00:00:00 1970
From: Grant Likely <grant.likely@secretlab.ca>
Date: Sat, 21 Apr 2007 14:03:23 -0600
Subject: [U-Boot-Users] SystemACE
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On 4/21/07, Michal Simek <monstr@seznam.cz> wrote:
> Hi,
> I have debugged systemace driver and ported it on Microblaze. I use
> SystemACE for loading bitstream to FPGA. But if the SystemACE initializes
> FPGA this part of code sets to zero CFGDONE bit in STATUSREG. And then
> release_cf_lock function resets SystemACE.
> I add this part of code to microblaze-git repository. Please test it if you
> can.
>
> Best regards,
> Michal Simek

Cool, thanks Michal.  I'll try it on my ml403 ppc design in the next
couple of days and provide feedback.  I've also got a handful of
systemace patches pending in my tree, so I'll try to get those cleaned
up and out for you to take a look at.

Cheers,
g.


-- 
Grant Likely, B.Sc. P.Eng.
Secret Lab Technologies Ltd.
grant.likely at secretlab.ca
(403) 399-0195