From mboxrd@z Thu Jan 1 00:00:00 1970 From: Christopher Covington Subject: Re: [PATCH] ARM: move firmware_ops to drivers/firmware Date: Mon, 18 Nov 2013 14:04:50 -0500 Message-ID: <528A64D2.4020107@codeaurora.org> References: <1384678169-28228-1-git-send-email-acourbot@nvidia.com> <52898417.80601@nvidia.com> <20131118115842.GE4050@arm.com> <528A4869.2020701@wwwdotorg.org> <20131118173047.GF9838@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Return-path: Received: from smtp.codeaurora.org ([198.145.11.231]:56584 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752067Ab3KRTEx (ORCPT ); Mon, 18 Nov 2013 14:04:53 -0500 In-Reply-To: <20131118173047.GF9838@arm.com> Sender: linux-samsung-soc-owner@vger.kernel.org List-Id: linux-samsung-soc@vger.kernel.org To: Catalin Marinas Cc: Stephen Warren , Alexandre Courbot , Kukjin Kim , Stephen Warren , Tomasz Figa , Linux Kernel Mailing List , Kyungmin Park , "linux-samsung-soc@vger.kernel.org" , Alex Courbot , Olof Johansson , Russell King , "linux-arm-kernel@lists.infradead.org" Hi Catalin, On 11/18/2013 12:30 PM, Catalin Marinas wrote: [...] > You can't run legacy AArch32 code at EL3 and have lower levels in AArch64 > mode (architectural constraint). What prevents AArch32 code from running at EL3 and then requesting a reset to AArch64 by writing to the Reset Management Register before sliding down to lower exception levels? Thanks, Christopher -- Employee of Qualcomm Innovation Center, Inc. Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by the Linux Foundation. From mboxrd@z Thu Jan 1 00:00:00 1970 From: cov@codeaurora.org (Christopher Covington) Date: Mon, 18 Nov 2013 14:04:50 -0500 Subject: [PATCH] ARM: move firmware_ops to drivers/firmware In-Reply-To: <20131118173047.GF9838@arm.com> References: <1384678169-28228-1-git-send-email-acourbot@nvidia.com> <52898417.80601@nvidia.com> <20131118115842.GE4050@arm.com> <528A4869.2020701@wwwdotorg.org> <20131118173047.GF9838@arm.com> Message-ID: <528A64D2.4020107@codeaurora.org> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi Catalin, On 11/18/2013 12:30 PM, Catalin Marinas wrote: [...] > You can't run legacy AArch32 code at EL3 and have lower levels in AArch64 > mode (architectural constraint). What prevents AArch32 code from running at EL3 and then requesting a reset to AArch64 by writing to the Reset Management Register before sliding down to lower exception levels? Thanks, Christopher -- Employee of Qualcomm Innovation Center, Inc. Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by the Linux Foundation.