All of lore.kernel.org
 help / color / mirror / Atom feed
From: Tom Rini <trini@ti.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] pcm051: Support for revision 3
Date: Thu, 21 Nov 2013 08:18:20 -0500	[thread overview]
Message-ID: <528E081C.7060904@ti.com> (raw)
In-Reply-To: <3617726.OHf7EZkJgs@lem-wkst-02>

-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

On 11/21/2013 05:05 AM, Lars Poeschel wrote:
> Am Dienstag, 19. November 2013, 15:08:27 schrieb Tom Rini:
>> On Tue, Nov 19, 2013 at 11:22:18AM +0100, Lars Poeschel wrote:
>>> From: Lars Poeschel <poeschel@lemonage.de>
>>> 
>>> Phytec sells revision or version 3 of pcm051. It is labeled
>>> 1358.3 on the board. The difference for u-boot is that is has
>>> other DDR3 RAM on it: 1 x MT41K256M16HA125E instead of 2 x
>>> MT41J256M8HX15E on revisions 1 and 2. Both configurations are
>>> 512 MiB. Configure your u-boot build with pcm051_rev3 for the
>>> new RAM and pcm051_rev1 for the old RAM configuration. Board
>>> revision 2 has to use pcm051_rev1 also.
>>> 
>>> Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
>> 
>> Is there no run-time way to tell if we're on rev1/2/3?
> 
> Unfortunately I am not aware of a 100% bullet proof one. One way
> would be to read the AM3359 silicon ID. I have two boards here:
> rev1 and rev3. The phytec rev3 board has a newer silicon on it. I
> don't know about rev2's silicon ID. And I am not sure if the rev3
> silicon change directly corresponds to the DDR RAM change and if
> all rev3 boards have the new silicon. What I know for sure is that
> the RAM change was with rev3. Nevertheless phytec itself supplies a
> patched barebox as bootloader. And they have a compile time config
> option for different RAM configurations of the board. And they even
> seem to have more RAM configurations than the two I have seen yet.

OK, thanks.

- -- 
Tom
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/

iQIcBAEBAgAGBQJSjggcAAoJENk4IS6UOR1WOFcQAJmvkp5P2nkvSRhYAgqupGBL
EczfkW/hERfExMHjzas+UUGUcr7WJgX4lnFMZOou0hdTBilkjl4gI1xVQfuoUMQA
fw0Gya8R6dI8I9x7rtoFRM69+mbA2HXNei040aqlX7mmqK5BSUA85IFlTUf7//A8
zXsiUDNzze6V0+TvzM/IFdA9ma1aQnNDoiuMEjcwFKC5/d4wgC0Lntx6SfwlFiKD
BuddoIglkMHDJ1ZjAhGgrZU0Jt4LuctD+mHRdN4GRo9evO8sXpbDU95ZsEefbza0
eT0mvXXy/gUEg7LUnRmmAKgOstLmX4ttC+9PxMWpmdO4LX8b4zEGPfI3Ev39KTj1
GwiKlmNudhBHIcCgfoj9dYTgXdpgGgw5KVU1sms1Nn/uTEvAG9wVIeiibzzHLmh3
XgibqSjMD3FosqG+tnliELJKnh/yAqpYVAV7ldVpKXP2VeKAdSRHwffTgbkYUYhS
KI2G+JXvQjOYS176uTTRkwDwPOSwx8A7cs/fkbTkPyWkzlyzn6ZDemmcLnv48f6F
XD+HBtcFpfplAxg4kJ9bws97tKgtYYJK0eoC6C82eM/k8XFkb/lJ7FaLusU4KGtM
4njiBYktv8I3J/kh2fOe2r9ACJpyBJFm+ffFJlN+x1GInMHiJ9tYpDliA0+Pw5Jm
vjbvV/rGHT9Lo1o73FUY
=hMkr
-----END PGP SIGNATURE-----

  reply	other threads:[~2013-11-21 13:18 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-11-19 10:22 [U-Boot] [PATCH] pcm051: Support for revision 3 Lars Poeschel
2013-11-19 20:08 ` Tom Rini
2013-11-21 10:05   ` Lars Poeschel
2013-11-21 13:18     ` Tom Rini [this message]
2013-12-04 22:04 ` [U-Boot] " Tom Rini

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=528E081C.7060904@ti.com \
    --to=trini@ti.com \
    --cc=u-boot@lists.denx.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.