All of lore.kernel.org
 help / color / mirror / Atom feed
From: Santosh Shilimkar <santosh.shilimkar@ti.com>
To: linux-omap@vger.kernel.org
Cc: "Marc Zyngier" <marc.zyngier@arm.com>,
	"Tony Lindgren" <tony@atomide.com>,
	"Santosh Shilimkar" <santosh.shilimkar@ti.com>,
	linux-arm-kernel@lists.infradead.org,
	"Benoît Cousson" <bcousson@baylibre.com>,
	"Christoffer Dall" <christoffer.dall@linaro.org>
Subject: Re: [PATCH 1/2] ARM: dts: OMAP5: Add maintenance interrupt for virtualisation
Date: Sat, 23 Nov 2013 19:38:51 -0500	[thread overview]
Message-ID: <52914A9B.7040602@ti.com> (raw)
In-Reply-To: <1385251666-27532-2-git-send-email-santosh.shilimkar@ti.com>

On Saturday 23 November 2013 07:07 PM, Santosh Shilimkar wrote:
> Add a maintenance IRQ using PPI 9 to OMAP5 device tree
> needed for virtualisation.
> 
> Cc: Marc Zyngier <marc.zyngier@arm.com>
> Cc: Christoffer Dall <christoffer.dall@linaro.org>
> Cc: Benoît Cousson <bcousson@baylibre.com>
> Cc: Tony Lindgren <tony@atomide.com>
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> ---
>  arch/arm/boot/dts/omap5.dtsi |    1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
> index fc3fad5..c9f1ae4 100644
> --- a/arch/arm/boot/dts/omap5.dtsi
> +++ b/arch/arm/boot/dts/omap5.dtsi
> @@ -74,6 +74,7 @@
>  		      <0x48212000 0x1000>,
>  		      <0x48214000 0x2000>,
>  		      <0x48216000 0x2000>;
> +		interrupts = <1 9 0x304>;
I should have used the GIC flags. Updated version end of the
email.

Regards,
Santosh


From 91cbd5f65ccd9a0780614fa7ab5505922bdce577 Mon Sep 17 00:00:00 2001
From: Santosh Shilimkar <santosh.shilimkar@ti.com>
Date: Thu, 12 Sep 2013 15:53:13 -0400
Subject: [PATCH 1/2] ARM: dts: OMAP5: Add maintenance interrupt for
 virtualisation

Add a maintenance IRQ using PPI 9 to OMAP5 device tree
needed for virtualisation.

Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Christoffer Dall <christoffer.dall@linaro.org>
Cc: Benoît Cousson <bcousson@baylibre.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
 arch/arm/boot/dts/omap5.dtsi |    1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index fc3fad5..907ab7b 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -74,6 +74,7 @@
 		      <0x48212000 0x1000>,
 		      <0x48214000 0x2000>,
 		      <0x48216000 0x2000>;
+		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
 	};
 
 	/*
-- 
1.7.9.5


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: santosh.shilimkar@ti.com (Santosh Shilimkar)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/2] ARM: dts: OMAP5: Add maintenance interrupt for virtualisation
Date: Sat, 23 Nov 2013 19:38:51 -0500	[thread overview]
Message-ID: <52914A9B.7040602@ti.com> (raw)
In-Reply-To: <1385251666-27532-2-git-send-email-santosh.shilimkar@ti.com>

On Saturday 23 November 2013 07:07 PM, Santosh Shilimkar wrote:
> Add a maintenance IRQ using PPI 9 to OMAP5 device tree
> needed for virtualisation.
> 
> Cc: Marc Zyngier <marc.zyngier@arm.com>
> Cc: Christoffer Dall <christoffer.dall@linaro.org>
> Cc: Beno?t Cousson <bcousson@baylibre.com>
> Cc: Tony Lindgren <tony@atomide.com>
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> ---
>  arch/arm/boot/dts/omap5.dtsi |    1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
> index fc3fad5..c9f1ae4 100644
> --- a/arch/arm/boot/dts/omap5.dtsi
> +++ b/arch/arm/boot/dts/omap5.dtsi
> @@ -74,6 +74,7 @@
>  		      <0x48212000 0x1000>,
>  		      <0x48214000 0x2000>,
>  		      <0x48216000 0x2000>;
> +		interrupts = <1 9 0x304>;
I should have used the GIC flags. Updated version end of the
email.

Regards,
Santosh


>From 91cbd5f65ccd9a0780614fa7ab5505922bdce577 Mon Sep 17 00:00:00 2001
From: Santosh Shilimkar <santosh.shilimkar@ti.com>
Date: Thu, 12 Sep 2013 15:53:13 -0400
Subject: [PATCH 1/2] ARM: dts: OMAP5: Add maintenance interrupt for
 virtualisation

Add a maintenance IRQ using PPI 9 to OMAP5 device tree
needed for virtualisation.

Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Christoffer Dall <christoffer.dall@linaro.org>
Cc: Beno?t Cousson <bcousson@baylibre.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
 arch/arm/boot/dts/omap5.dtsi |    1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index fc3fad5..907ab7b 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -74,6 +74,7 @@
 		      <0x48212000 0x1000>,
 		      <0x48214000 0x2000>,
 		      <0x48216000 0x2000>;
+		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
 	};
 
 	/*
-- 
1.7.9.5

  reply	other threads:[~2013-11-24  0:38 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-11-24  0:07 [PATCH 0/2] ARM: OMAP5: Couple of patches for KVM Santosh Shilimkar
2013-11-24  0:07 ` Santosh Shilimkar
2013-11-24  0:07 ` [PATCH 1/2] ARM: dts: OMAP5: Add maintenance interrupt for virtualisation Santosh Shilimkar
2013-11-24  0:07   ` Santosh Shilimkar
2013-11-24  0:38   ` Santosh Shilimkar [this message]
2013-11-24  0:38     ` Santosh Shilimkar
2013-11-24  0:07 ` [PATCH 2/2] ARM: OMAP5: Add HYP mode entry support for secondary CPUs Santosh Shilimkar
2013-11-24  0:07   ` Santosh Shilimkar
2013-11-25 15:09   ` Christoffer Dall
2013-11-25 15:09     ` Christoffer Dall
2013-11-25 16:28     ` Santosh Shilimkar
2013-11-25 16:28       ` Santosh Shilimkar
2013-11-25 16:33       ` Christoffer Dall
2013-11-25 16:33         ` Christoffer Dall
2013-11-25 16:59         ` HYP Kernel boot requirements [Was ...Re: [PATCH 2/2] ARM: OMAP5: Add HYP mode entry support for secondary CPUs] Santosh Shilimkar
2013-11-25 16:59           ` Santosh Shilimkar
2013-11-25 17:28           ` Catalin Marinas
2013-11-25 17:28             ` Catalin Marinas
2013-11-25 19:44             ` HYP Kernel boot requirements Santosh Shilimkar
2013-11-25 19:44               ` Santosh Shilimkar
2013-11-26 14:13               ` Catalin Marinas
2013-11-26 14:13                 ` Catalin Marinas
2013-11-26 14:47                 ` Santosh Shilimkar
2013-11-26 14:47                   ` Santosh Shilimkar
2013-11-26 17:37                   ` Dave Martin
2013-11-26 17:37                     ` Dave Martin
2013-11-26 21:49                     ` Santosh Shilimkar
2013-11-26 21:49                       ` Santosh Shilimkar
2013-11-27 14:38                       ` Lorenzo Pieralisi
2013-11-27 14:38                         ` Lorenzo Pieralisi
2013-11-25 16:42       ` [PATCH 2/2] ARM: OMAP5: Add HYP mode entry support for secondary CPUs Marc Zyngier
2013-11-25 16:42         ` Marc Zyngier
2013-11-25 17:02         ` Santosh Shilimkar
2013-11-25 17:02           ` Santosh Shilimkar

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=52914A9B.7040602@ti.com \
    --to=santosh.shilimkar@ti.com \
    --cc=bcousson@baylibre.com \
    --cc=christoffer.dall@linaro.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-omap@vger.kernel.org \
    --cc=marc.zyngier@arm.com \
    --cc=tony@atomide.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.