Re: [PATCH v3 04/13] xen: arm: add a quirk to handle platforms with unusual GIC layout

[Julien Grall <julien.grall@linaro.org>]

On 11/25/2013 11:06 AM, Ian Campbell wrote:
> On some platforms the pages are placed at a 64K stride instead of as
> contiguous 4K pages.
>
> This is because the ARM64 architecture allows for page sizes of 4/16/64K in
> the MMU so a larger stride allow more granular control of mappings. We only
> currently support 4K.
>
> Use this quirk on the xgene platform.
>
> This should ideally be fixed by an extension to the device tree bindings as
> described in http://www.spinics.net/lists/devicetree/msg10473.html especially
> http://www.spinics.net/lists/devicetree/msg10478.html. However for the time
> being a platform specific quirk will do.
>
> Note that we always map the GICV to the guest (including dom0) at a 4K stride
> length and this is reflected in the DTB passed to the guest.
>
> Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
> ---
> v3: Always map the GICV to the guest as contiguous 4k pages.
> v2: This replaces "xen: arm: GICC_DIR register at offset 0x10000 instead of 0x1000"
> ---
>   xen/arch/arm/gic.c                   |   37 ++++++++++++++++++++++++++++------
>   xen/arch/arm/platforms/xgene-storm.c |    2 +-
>   xen/include/asm-arm/platform.h       |    5 +++++
>   3 files changed, 37 insertions(+), 7 deletions(-)
>
> diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c
> index ab49106..da4685e 100644

[..]

> @@ -823,6 +827,8 @@ void gic_interrupt(struct cpu_user_regs *regs, int is_fiq)
>
>   int gicv_setup(struct domain *d)
>   {
> +    int ret;
> +
>       /*
>        * Domain 0 gets the hardware address.
>        * Guests get the virtual platform layout.
> @@ -840,11 +846,30 @@ int gicv_setup(struct domain *d)
>
>       d->arch.vgic.nr_lines = 0;
>
> -    /* map the gic virtual cpu interface in the gic cpu interface region of
> -     * the guest */
> -    return map_mmio_regions(d, d->arch.vgic.cbase,
> -                            d->arch.vgic.cbase + (2 * PAGE_SIZE) - 1,
> -                            gic.vbase);
> +    /*
> +     * Map the gic virtual cpu interface in the gic cpu interface
> +     * region of the guest.
> +     *
> +     * The second page is always mapped at +4K irrespective of the
> +     * GIC_64K_STRIDE quirk. The DTB passed to the guest reflects this.
> +     */
> +    ret = map_mmio_regions(d, d->arch.vgic.cbase,
> +                           d->arch.vgic.cbase + PAGE_SIZE - 1,
> +                           gic.vbase);
> +    if (ret)
> +        return ret;
> +
> +    if ( platform_has_quirk(PLATFORM_QUIRK_GIC_64K_STRIDE) )
> +        ret = map_mmio_regions(d, d->arch.vgic.cbase + PAGE_SIZE,
> +                               d->arch.vgic.cbase + (2 * PAGE_SIZE) - 1,
> +                               gic.vbase + PAGE_SIZE);
> +    else
> +        ret = map_mmio_regions(d, d->arch.vgic.cbase + PAGE_SIZE,
> +                               d->arch.vgic.cbase + (2 * PAGE_SIZE) - 1,
> +                               gic.vbase + 16*PAGE_SIZE);

The condition needs to be inverted here ... the CPU second page is at 
64K only on platform where the quirk is enabled.

-- 
Julien Grall