From: Marc Zyngier <marc.zyngier@arm.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 4/9] ARM: non-sec: reset CNTVOFF to zero
Date: Tue, 26 Nov 2013 14:46:22 +0000 [thread overview]
Message-ID: <5294B43E.3090307@arm.com> (raw)
In-Reply-To: <5294B332.3050809@linaro.org>
On 26/11/13 14:41, Andre Przywara wrote:
> On 11/21/2013 09:59 AM, Marc Zyngier wrote:
>> Before switching to non-secure, make sure that CNTVOFF is set
>> to zero on all CPUs. Otherwise, kernel running in non-secure
>> without HYP enabled (hence using virtual timers) may observe
>> timers that are not synchronized, effectively seeing time
>> going backward...
>
> Under what circumstances would native Linux use the virtual timers? When
> VIRT_EXT is not defined?
Yes. In general, when the kernel is not entered in HYP mode.
M.
> Regards,
> Andre.
>
>>
>> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
>> ---
>> arch/arm/cpu/armv7/nonsec_virt.S | 7 +++++++
>> 1 file changed, 7 insertions(+)
>>
>> diff --git a/arch/arm/cpu/armv7/nonsec_virt.S b/arch/arm/cpu/armv7/nonsec_virt.S
>> index 648066f..bbacbce 100644
>> --- a/arch/arm/cpu/armv7/nonsec_virt.S
>> +++ b/arch/arm/cpu/armv7/nonsec_virt.S
>> @@ -53,7 +53,14 @@ _secure_monitor:
>> mrceq p15, 0, r0, c12, c0, 1 @ get MVBAR value
>> mcreq p15, 4, r0, c12, c0, 0 @ write HVBAR
>> #endif
>> + bne 1f
>>
>> + @ Reset CNTVOFF to 0 before leaving monitor mode
>> + mrc p15, 0, r0, c0, c1, 1 @ read ID_PFR1
>> + ands r0, r0, #CPUID_ARM_GENTIMER_MASK @ test arch timer bits
>> + movne r0, #0
>> + mcrrne p15, 4, r0, r0, c14 @ Reset CNTVOFF to zero
>> +1:
>> movs pc, lr @ return to non-secure SVC
>>
>> _hyp_trap:
>>
>
>
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2013-11-26 14:46 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-11-21 8:59 [U-Boot] [PATCH 0/9] ARMv7: add PSCI support to u-boot Marc Zyngier
2013-11-21 8:59 ` [U-Boot] [PATCH 1/9] ARM: HYP/non-sec: fix alignment requirements for vectors Marc Zyngier
2013-11-21 10:19 ` Masahiro Yamada
2013-11-21 10:36 ` Marc Zyngier
2013-11-21 22:24 ` Andre Przywara
2013-11-21 8:59 ` [U-Boot] [PATCH 2/9] ARM: HYP/non-sec: move switch to non-sec to the last boot phase Marc Zyngier
2013-11-26 14:36 ` Andre Przywara
2013-11-21 8:59 ` [U-Boot] [PATCH 3/9] ARM: HYP/non-sec: add a barrier after setting SCR.NS==1 Marc Zyngier
2013-11-22 1:51 ` Christoffer Dall
2013-11-22 10:56 ` Marc Zyngier
2013-11-22 16:53 ` Christoffer Dall
2013-12-30 3:10 ` [U-Boot] [PATCH 3/9] ARM: HYP/non-sec switch in bootm.c TigerLiu at viatech.com.cn
2013-12-30 4:57 ` Christoffer Dall
2013-12-30 5:15 ` TigerLiu at viatech.com.cn
2013-12-30 5:22 ` Christoffer Dall
2013-12-30 5:33 ` TigerLiu at viatech.com.cn
2013-11-26 14:39 ` [U-Boot] [PATCH 3/9] ARM: HYP/non-sec: add a barrier after setting SCR.NS==1 Andre Przywara
2013-11-21 8:59 ` [U-Boot] [PATCH 4/9] ARM: non-sec: reset CNTVOFF to zero Marc Zyngier
2013-11-26 14:41 ` Andre Przywara
2013-11-26 14:46 ` Marc Zyngier [this message]
2013-11-21 8:59 ` [U-Boot] [PATCH 5/9] ARM: HYP/non-sec: add generic ARMv7 PSCI code Marc Zyngier
2013-11-21 8:59 ` [U-Boot] [PATCH 6/9] ARM: HYP/non-sec: make pen code sections depend on !ARMV7_PSCI Marc Zyngier
2014-06-04 1:51 ` [U-Boot] [PATCH 6/9] ARM: HYP/non-sec: make pen code sectionsdepend " TigerLiu at via-alliance.com
2013-11-21 9:00 ` [U-Boot] [PATCH 7/9] ARM: HYP/non-sec: add the option for a second-stage monitor Marc Zyngier
2013-11-21 9:00 ` [U-Boot] [PATCH 8/9] sunxi: HYP/non-sec: add sun7i PSCI backend Marc Zyngier
2013-11-21 9:00 ` [U-Boot] [PATCH 9/9] sunxi: HYP/non-sec: configure CNTFRQ on all CPUs Marc Zyngier
2013-11-21 14:28 ` [U-Boot] [PATCH 0/9] ARMv7: add PSCI support to u-boot Rob Herring
2013-11-21 15:04 ` Marc Zyngier
2013-11-22 1:54 ` Christoffer Dall
2013-11-22 3:58 ` Anup Patel
2013-11-22 8:42 ` [U-Boot] [linux-sunxi] " Ian Campbell
2013-11-22 9:00 ` Anup Patel
2013-11-22 16:49 ` Christoffer Dall
2013-11-22 10:25 ` [U-Boot] " Marc Zyngier
2013-11-22 10:51 ` Marc Zyngier
2013-11-22 8:40 ` [U-Boot] [linux-sunxi] " Ian Campbell
2013-11-22 8:56 ` Anup Patel
2013-11-22 10:49 ` Ian Campbell
2013-11-22 14:51 ` Marc Zyngier
2013-12-06 11:43 ` [U-Boot] " Andre Przywara
2013-12-06 12:12 ` Marc Zyngier
2013-12-06 12:59 ` [U-Boot] [linux-sunxi] " Ian Campbell
2013-12-06 15:44 ` Ian Campbell
2013-12-06 15:48 ` Andre Przywara
2013-12-06 17:21 ` Ian Campbell
2013-12-06 17:45 ` Marc Zyngier
2013-12-06 13:03 ` [U-Boot] " Andre Przywara
2013-12-06 16:00 ` Marc Zyngier
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=5294B43E.3090307@arm.com \
--to=marc.zyngier@arm.com \
--cc=u-boot@lists.denx.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.