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Date: Wed, 27 Nov 2013 13:44:13 +0800
From: Li Guang <lig.fnst@cn.fujitsu.com>
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Subject: Re: [Qemu-devel] [PATCH v4 2/4] hw/intc: add sunxi interrupt
 controller device
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To: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Cc: Peter Maydell <peter.maydell@linaro.org>, "qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>

Peter Crosthwaite wrote:
> On Wed, Nov 27, 2013 at 1:36 PM, Li Guang<lig.fnst@cn.fujitsu.com>  wrote:
>    
>> Li Guang wrote:
>>      
>>> Peter Crosthwaite wrote:
>>>        
>>>> On Tue, Nov 26, 2013 at 5:22 PM, liguang<lig.fnst@cn.fujitsu.com>   wrote:
>>>>          
>>>>> Signed-off-by: liguang<lig.fnst@cn.fujitsu.com>
>>>>> ---
>>>>>    default-configs/arm-softmmu.mak |    1 +
>>>>>    hw/intc/Makefile.objs           |    1 +
>>>>>    hw/intc/sunxi-pic.c             |  238
>>>>> +++++++++++++++++++++++++++++++++++++++
>>>>>    include/hw/intc/sunxi-pic.h     |   20 ++++
>>>>>            
>    
>>>>> +
>>>>> +static void sunxi_pic_set_irq(void *opaque, int irq, int level)
>>>>> +{
>>>>> +    SunxiPICState *s = opaque;
>>>>> +
>>>>> +    if (level) {
>>>>> +        set_bit(irq, (void *)&s->irq_pending[irq/32]);
>>>>>            
>>>> set_bit(irq % 32, ...)
>>>>
>>>>          
>>> OK
>>>        
>>
>> No, it is wrong,
>> irq/32 is right.
>>
>>      
> The irq/32 is right I agree. This issue is the first arugment.
> Shouln't the whole thing be:
>
> set_bit(irq%32, (void *)&s->irq_pending[irq/32]);
>
>
>    

OK, fix like this

diff --git a/hw/intc/sunxi-pic.c b/hw/intc/sunxi-pic.c
index 5fd86f9..ea75f84 100644
--- a/hw/intc/sunxi-pic.c
+++ b/hw/intc/sunxi-pic.c
@@ -77,7 +77,7 @@ static void sunxi_pic_set_irq(void *opaque, int irq, 
int level)
      SunxiPICState *s = opaque;

      if (level) {
-        set_bit(irq, (void *)&s->irq_pending[irq/32]);
+        set_bit(irq%32, (void *)&s->irq_pending[irq/32]);
      }
      sunxi_pic_update(s);

thanks!
Li Guang