Re: [PATCH 3/4 V3] X86: MPX IA32_BNDCFGS msr handle

[Andrew Cooper <andrew.cooper3@citrix.com>]

On 27/11/13 14:37, Liu, Jinsong wrote:
> Andrew Cooper wrote:
>> On 27/11/13 14:27, Liu, Jinsong wrote:
>>> Andrew Cooper wrote:
>>>> On 27/11/13 13:50, Liu, Jinsong wrote:
>>>>> From 291adaf4ad6174c5641a7239c1801373e92e9975 Mon Sep 17 00:00:00
>>>>> 2001 From: Liu Jinsong <jinsong.liu@intel.com>
>>>>> Date: Thu, 28 Nov 2013 05:26:06 +0800
>>>>> Subject: [PATCH 3/4 V3] X86: MPX IA32_BNDCFGS msr handle
>>>>>
>>>>> When MPX supported, a new guest-state field for IA32_BNDCFGS
>>>>> is added to the VMCS. In addition, two new controls are added:
>>>>>  - a VM-exit control called "clear BNDCFGS"
>>>>>  - a VM-entry control called "load BNDCFGS."
>>>>> VM exits always save IA32_BNDCFGS into BNDCFGS field of VMCS.
>>>>>
>>>>> Signed-off-by: Xudong Hao <xudong.hao@intel.com>
>>>>> Reviewed-by: Liu Jinsong <jinsong.liu@intel.com>
>>>>>
>>>>> Unlikely, but in case VMX support is not available, not expose
>>>>> MPX to hvm guest.
>>>> You are still missing the point.
>>>>
>>>> I as the administrator choose to prevent an HVM guest from using
>>>> MPX. Perhaps I want to create a heterogeneous pool.
>>>>
>>>> Therefore, the bit is disabled in the domains cpuid policy, despite
>>>> being available on the hardware.
>>>>
>>>> ~Andrew
>>>>
>>> Could you tell me the reason why choose to prevent HVM from using
>>> MPX? 
>>>
>>> Thanks,
>>> Jinsong
>> For exactly the case I gave - a VM in a heterogeneous pool where one
>> server supports MPX and the other is lacking the MPX feature.
>>
>> ~Andrew
>>
> I didn't see the point of your case to prevent HVM MPX feature.
> Could you elaborate more of your concern?
>
> Thanks,
> Jinsong

It is very common to have pools of servers made of different generations
of CPU.  E.g. Ivy Bridge and Haswell.  To safely migrate a VM, the
feature set the VM can see must be the common subset of the two.

~Andrew