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From: mkl@pengutronix.de (Marc Kleine-Budde)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 17/17] usb: phy-mxs: do not set PWD.RXPWD1PT1 for low speed connection
Date: Tue, 03 Dec 2013 09:53:11 +0100	[thread overview]
Message-ID: <529D9BF7.1080707@pengutronix.de> (raw)
In-Reply-To: <1386056231-17258-18-git-send-email-peter.chen@freescale.com>

On 12/03/2013 08:37 AM, Peter Chen wrote:
> At very rare cases, the SoF will not send out after resume with
> low speed connection. The workaround is do not power down
> PWD.RXPWD1PT1 bit during the suspend.

Is this also a fix for newly added code? If so please also squash.

> Signed-off-by: Peter Chen <peter.chen@freescale.com>
> ---
>  drivers/usb/phy/phy-mxs-usb.c |   47 ++++++++++++++++++++++++++++++++++++++++-
>  1 files changed, 46 insertions(+), 1 deletions(-)
> 
> diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c
> index 542b6ec..5ae4a57 100644
> --- a/drivers/usb/phy/phy-mxs-usb.c
> +++ b/drivers/usb/phy/phy-mxs-usb.c
> @@ -69,6 +69,9 @@
>  #define ANADIG_USB2_LOOPBACK_SET		0x244
>  #define ANADIG_USB2_LOOPBACK_CLR		0x248
>  
> +#define ANADIG_USB1_MISC			0x1f0
> +#define ANADIG_USB2_MISC			0x250
> +
>  #define BM_ANADIG_ANA_MISC0_STOP_MODE_CONFIG	BIT(12)
>  #define BM_ANADIG_ANA_MISC0_STOP_MODE_CONFIG_SL BIT(11)
>  
> @@ -80,6 +83,11 @@
>  #define BM_ANADIG_USB2_LOOPBACK_UTMI_DIG_TST1	BIT(2)
>  #define BM_ANADIG_USB2_LOOPBACK_TSTI_TX_EN	BIT(5)
>  
> +#define BM_ANADIG_USB1_MISC_RX_VPIN_FS		BIT(29)
> +#define BM_ANADIG_USB1_MISC_RX_VMIN_FS		BIT(28)
> +#define BM_ANADIG_USB2_MISC_RX_VPIN_FS		BIT(29)
> +#define BM_ANADIG_USB2_MISC_RX_VMIN_FS		BIT(28)
> +
>  #define to_mxs_phy(p) container_of((p), struct mxs_phy, phy)
>  
>  /* Do disconnection between PHY and controller without vbus */
> @@ -296,12 +304,49 @@ static void mxs_phy_shutdown(struct usb_phy *phy)
>  	clk_disable_unprepare(mxs_phy->clk);
>  }
>  
> +static bool mxs_phy_is_low_speed_connection(struct mxs_phy *mxs_phy)
> +{
> +	unsigned int line_state;
> +	/* bit definition is the same for all controllers */
> +	unsigned int dp_bit = BM_ANADIG_USB1_MISC_RX_VPIN_FS,
> +		     dm_bit = BM_ANADIG_USB1_MISC_RX_VMIN_FS;
> +	unsigned int reg = ANADIG_USB1_MISC;
> +
> +	/* If the SoCs don't have anatop, quit */
> +	if (!mxs_phy->regmap_anatop)
> +		return false;
> +
> +	if (mxs_phy->port_id == 0)
> +		reg = ANADIG_USB1_MISC;
> +	else if (mxs_phy->port_id == 1)
> +		reg = ANADIG_USB2_MISC;
> +
> +	regmap_read(mxs_phy->regmap_anatop, reg, &line_state);
> +
> +	if ((line_state & (dp_bit | dm_bit)) ==  dm_bit)
> +		return true;
> +	else
> +		return false;
> +}
> +
>  static int mxs_phy_suspend(struct usb_phy *x, int suspend)
>  {
>  	struct mxs_phy *mxs_phy = to_mxs_phy(x);
> +	bool low_speed_connection, vbus_is_on;
> +
> +	low_speed_connection = mxs_phy_is_low_speed_connection(mxs_phy);
> +	vbus_is_on = mxs_phy_get_vbus_status(mxs_phy);
>  
>  	if (suspend) {
> -		writel(0xffffffff, x->io_priv + HW_USBPHY_PWD);
> +		/*
> +		 * FIXME: Do not power down RXPWD1PT1 bit for low speed

Is this FIXME still true?

> +		 * connect. The low speed connection will have problem at
> +		 * very rare cases during usb suspend and resume process.
> +		 */
> +		if (low_speed_connection & vbus_is_on)
> +			writel(0xfffbffff, x->io_priv + HW_USBPHY_PWD);
> +		else
> +			writel(0xffffffff, x->io_priv + HW_USBPHY_PWD);
>  		writel(BM_USBPHY_CTRL_CLKGATE,
>  		       x->io_priv + HW_USBPHY_CTRL_SET);
>  		clk_disable_unprepare(mxs_phy->clk);
> 

Marc

-- 
Pengutronix e.K.                  | Marc Kleine-Budde           |
Industrial Linux Solutions        | Phone: +49-231-2826-924     |
Vertretung West/Dortmund          | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686  | http://www.pengutronix.de   |

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WARNING: multiple messages have this Message-ID (diff)
From: Marc Kleine-Budde <mkl-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
To: Peter Chen <peter.chen-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
Cc: balbi-l0cyMroinI0@public.gmane.org,
	shawn.guo-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
	rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org,
	grant.likely-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
	alexander.shishkin-VuQAYsv1563Yd54FQh9/CA@public.gmane.org,
	linux-usb-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	festevam-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	marex-ynQEQJNshbs@public.gmane.org,
	kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org,
	m.grzeschik-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org,
	frank.li-KZfg59tc24xl57MIdRCFDg@public.gmane.org,
	gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH v4 17/17] usb: phy-mxs: do not set PWD.RXPWD1PT1 for low speed connection
Date: Tue, 03 Dec 2013 09:53:11 +0100	[thread overview]
Message-ID: <529D9BF7.1080707@pengutronix.de> (raw)
In-Reply-To: <1386056231-17258-18-git-send-email-peter.chen-KZfg59tc24xl57MIdRCFDg@public.gmane.org>

[-- Attachment #1: Type: text/plain, Size: 3565 bytes --]

On 12/03/2013 08:37 AM, Peter Chen wrote:
> At very rare cases, the SoF will not send out after resume with
> low speed connection. The workaround is do not power down
> PWD.RXPWD1PT1 bit during the suspend.

Is this also a fix for newly added code? If so please also squash.

> Signed-off-by: Peter Chen <peter.chen-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> ---
>  drivers/usb/phy/phy-mxs-usb.c |   47 ++++++++++++++++++++++++++++++++++++++++-
>  1 files changed, 46 insertions(+), 1 deletions(-)
> 
> diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c
> index 542b6ec..5ae4a57 100644
> --- a/drivers/usb/phy/phy-mxs-usb.c
> +++ b/drivers/usb/phy/phy-mxs-usb.c
> @@ -69,6 +69,9 @@
>  #define ANADIG_USB2_LOOPBACK_SET		0x244
>  #define ANADIG_USB2_LOOPBACK_CLR		0x248
>  
> +#define ANADIG_USB1_MISC			0x1f0
> +#define ANADIG_USB2_MISC			0x250
> +
>  #define BM_ANADIG_ANA_MISC0_STOP_MODE_CONFIG	BIT(12)
>  #define BM_ANADIG_ANA_MISC0_STOP_MODE_CONFIG_SL BIT(11)
>  
> @@ -80,6 +83,11 @@
>  #define BM_ANADIG_USB2_LOOPBACK_UTMI_DIG_TST1	BIT(2)
>  #define BM_ANADIG_USB2_LOOPBACK_TSTI_TX_EN	BIT(5)
>  
> +#define BM_ANADIG_USB1_MISC_RX_VPIN_FS		BIT(29)
> +#define BM_ANADIG_USB1_MISC_RX_VMIN_FS		BIT(28)
> +#define BM_ANADIG_USB2_MISC_RX_VPIN_FS		BIT(29)
> +#define BM_ANADIG_USB2_MISC_RX_VMIN_FS		BIT(28)
> +
>  #define to_mxs_phy(p) container_of((p), struct mxs_phy, phy)
>  
>  /* Do disconnection between PHY and controller without vbus */
> @@ -296,12 +304,49 @@ static void mxs_phy_shutdown(struct usb_phy *phy)
>  	clk_disable_unprepare(mxs_phy->clk);
>  }
>  
> +static bool mxs_phy_is_low_speed_connection(struct mxs_phy *mxs_phy)
> +{
> +	unsigned int line_state;
> +	/* bit definition is the same for all controllers */
> +	unsigned int dp_bit = BM_ANADIG_USB1_MISC_RX_VPIN_FS,
> +		     dm_bit = BM_ANADIG_USB1_MISC_RX_VMIN_FS;
> +	unsigned int reg = ANADIG_USB1_MISC;
> +
> +	/* If the SoCs don't have anatop, quit */
> +	if (!mxs_phy->regmap_anatop)
> +		return false;
> +
> +	if (mxs_phy->port_id == 0)
> +		reg = ANADIG_USB1_MISC;
> +	else if (mxs_phy->port_id == 1)
> +		reg = ANADIG_USB2_MISC;
> +
> +	regmap_read(mxs_phy->regmap_anatop, reg, &line_state);
> +
> +	if ((line_state & (dp_bit | dm_bit)) ==  dm_bit)
> +		return true;
> +	else
> +		return false;
> +}
> +
>  static int mxs_phy_suspend(struct usb_phy *x, int suspend)
>  {
>  	struct mxs_phy *mxs_phy = to_mxs_phy(x);
> +	bool low_speed_connection, vbus_is_on;
> +
> +	low_speed_connection = mxs_phy_is_low_speed_connection(mxs_phy);
> +	vbus_is_on = mxs_phy_get_vbus_status(mxs_phy);
>  
>  	if (suspend) {
> -		writel(0xffffffff, x->io_priv + HW_USBPHY_PWD);
> +		/*
> +		 * FIXME: Do not power down RXPWD1PT1 bit for low speed

Is this FIXME still true?

> +		 * connect. The low speed connection will have problem at
> +		 * very rare cases during usb suspend and resume process.
> +		 */
> +		if (low_speed_connection & vbus_is_on)
> +			writel(0xfffbffff, x->io_priv + HW_USBPHY_PWD);
> +		else
> +			writel(0xffffffff, x->io_priv + HW_USBPHY_PWD);
>  		writel(BM_USBPHY_CTRL_CLKGATE,
>  		       x->io_priv + HW_USBPHY_CTRL_SET);
>  		clk_disable_unprepare(mxs_phy->clk);
> 

Marc

-- 
Pengutronix e.K.                  | Marc Kleine-Budde           |
Industrial Linux Solutions        | Phone: +49-231-2826-924     |
Vertretung West/Dortmund          | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686  | http://www.pengutronix.de   |


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  reply	other threads:[~2013-12-03  8:53 UTC|newest]

Thread overview: 64+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-12-03  7:36 [PATCH v4 00/17] Add power management support for mxs phy Peter Chen
2013-12-03  7:36 ` Peter Chen
2013-12-03  7:36 ` [PATCH v4 01/17] usb: doc: phy-mxs: Add more compatible strings Peter Chen
2013-12-03  7:36   ` Peter Chen
2013-12-03  7:36 ` [PATCH v4 02/17] usb: phy-mxs: Add platform judgement code Peter Chen
2013-12-03  7:36   ` Peter Chen
2013-12-03  8:38   ` Marc Kleine-Budde
2013-12-03  8:38     ` Marc Kleine-Budde
2013-12-03  8:12     ` Peter Chen
2013-12-03  8:12       ` Peter Chen
2013-12-03 10:24   ` Michael Grzeschik
2013-12-03 10:24     ` Michael Grzeschik
2013-12-03 14:09     ` Peter Chen
2013-12-03 14:09       ` Peter Chen
2013-12-03  7:36 ` [PATCH v4 03/17] usb: phy-mxs: Add auto clock and power setting Peter Chen
2013-12-03  7:36   ` Peter Chen
2013-12-03  7:36 ` [PATCH v4 04/17] usb: doc: phy-mxs: update binding for adding anatop phandle Peter Chen
2013-12-03  7:36   ` Peter Chen
2013-12-03  7:36 ` [PATCH v4 05/17] ARM: dts: imx6: add anatop phandle for usbphy Peter Chen
2013-12-03  7:36   ` Peter Chen
2013-12-03  7:37 ` [PATCH v4 06/17] usb: phy-mxs: Add anatop regmap Peter Chen
2013-12-03  7:37   ` Peter Chen
2013-12-03  7:37 ` [PATCH v4 07/17] usb: phy: add notify suspend and resume callback Peter Chen
2013-12-03  7:37   ` Peter Chen
2013-12-03  7:37 ` [PATCH v4 08/17] usb: phy-mxs: Add implementation of nofity_suspend and notify_resume Peter Chen
2013-12-03  7:37   ` Peter Chen
2013-12-03  7:37 ` [PATCH v4 09/17] usb: phy-mxs: Enable IC fixes for related SoCs Peter Chen
2013-12-03  7:37   ` Peter Chen
2013-12-03  8:27   ` Marc Kleine-Budde
2013-12-03  8:27     ` Marc Kleine-Budde
2013-12-03  8:38     ` Peter Chen
2013-12-03  8:38       ` Peter Chen
2013-12-03  8:43       ` Marc Kleine-Budde
2013-12-03  8:43         ` Marc Kleine-Budde
2013-12-03  8:49         ` Peter Chen
2013-12-03  8:49           ` Peter Chen
2013-12-03  7:37 ` [PATCH v4 10/17] usb: phy: Add set_wakeup API Peter Chen
2013-12-03  7:37   ` Peter Chen
2013-12-03  7:37 ` [PATCH v4 11/17] usb: phy-mxs: Add implementation of set_wakeup Peter Chen
2013-12-03  7:37   ` Peter Chen
2013-12-03  7:37 ` [PATCH v4 12/17] usb: phy-mxs: Add system suspend/resume API Peter Chen
2013-12-03  7:37   ` Peter Chen
2013-12-03  7:37 ` [PATCH v4 13/17] usb: phy-mxs: Add sync time after controller clear phcd Peter Chen
2013-12-03  7:37   ` Peter Chen
2013-12-03  7:37 ` [PATCH v4 14/17] ARM: dts: imx: add mxs phy controller id Peter Chen
2013-12-03  7:37   ` Peter Chen
2013-12-03  7:37 ` [PATCH v4 15/17] usb: phy-mxs: add " Peter Chen
2013-12-03  7:37   ` Peter Chen
2013-12-03  7:37 ` [PATCH v4 16/17] usb: phy-mxs: fix the problem by only using 1st controller's register Peter Chen
2013-12-03  7:37   ` Peter Chen
2013-12-03  8:34   ` Marc Kleine-Budde
2013-12-03  8:34     ` Marc Kleine-Budde
2013-12-03  8:12     ` Peter Chen
2013-12-03  8:12       ` Peter Chen
2013-12-03  7:37 ` [PATCH v4 17/17] usb: phy-mxs: do not set PWD.RXPWD1PT1 for low speed connection Peter Chen
2013-12-03  7:37   ` Peter Chen
2013-12-03  8:53   ` Marc Kleine-Budde [this message]
2013-12-03  8:53     ` Marc Kleine-Budde
2013-12-03  9:19     ` Peter Chen
2013-12-03  9:19       ` Peter Chen
2013-12-03  9:28       ` Marc Kleine-Budde
2013-12-03  9:28         ` Marc Kleine-Budde
2013-12-03  9:48         ` Peter Chen
2013-12-03  9:48           ` Peter Chen

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