From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43703) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Vo96e-0006TU-6I for qemu-devel@nongnu.org; Wed, 04 Dec 2013 04:51:03 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Vo96W-0005an-IY for qemu-devel@nongnu.org; Wed, 04 Dec 2013 04:50:56 -0500 Received: from mailout3.w1.samsung.com ([210.118.77.13]:55683) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Vo96W-0005ab-At for qemu-devel@nongnu.org; Wed, 04 Dec 2013 04:50:48 -0500 Received: from eucpsbgm2.samsung.com (unknown [203.254.199.245]) by mailout3.w1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MXA006WP0OKA520@mailout3.w1.samsung.com> for qemu-devel@nongnu.org; Wed, 04 Dec 2013 09:50:44 +0000 (GMT) Message-id: <529EFAF3.8020704@samsung.com> Date: Wed, 04 Dec 2013 13:50:43 +0400 From: Fedorov Sergey MIME-version: 1.0 References: <1386060535-15908-1-git-send-email-s.fedorov@samsung.com> <1386060535-15908-4-git-send-email-s.fedorov@samsung.com> In-reply-to: Content-type: text/plain; charset=ISO-8859-1; format=flowed Content-transfer-encoding: 7bit Subject: Re: [Qemu-devel] [RFC PATCH 03/21] target-arm: adjust TTBCR for TrustZone feature List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Crosthwaite Cc: Peter Maydell , a.basov@samsung.com, "qemu-devel@nongnu.org Developers" , johannes.winter@iaik.tugraz.at On 12/03/2013 04:15 PM, Peter Crosthwaite wrote: > On Tue, Dec 3, 2013 at 6:48 PM, Sergey Fedorov wrote: >> TTBCR has additional fields PD0 and PD1 when using Short-descriptor >> translation table format on a CPU with TrustZone feature support. >> >> Signed-off-by: Sergey Fedorov >> --- >> target-arm/helper.c | 4 +++- >> 1 file changed, 3 insertions(+), 1 deletion(-) >> >> diff --git a/target-arm/helper.c b/target-arm/helper.c >> index a247ca0..6642e53 100644 >> --- a/target-arm/helper.c >> +++ b/target-arm/helper.c >> @@ -1159,8 +1159,10 @@ static int vmsa_ttbcr_raw_write(CPUARMState *env, const ARMCPRegInfo *ri, >> { >> int maskshift = extract32(value, 0, 3); >> >> - if (arm_feature(env, ARM_FEATURE_LPAE)) { >> + if (arm_feature(env, ARM_FEATURE_LPAE) && (value & (1 << 31))) { > This appears to be changing more than just trustzone dependent > behavior. That is, if we take just this hunk and ignore the one below > you see a change in the non-tz behaviour. Is the hunk legitimate > irrespective of trustzone support? Yes, current implementation is not accurate according to ARMv7-AR reference manual. See "B4.1.153 TTBCR, Translation Table Base Control Register, VMSA | TTBCR format when using the Long-descriptor translation table format". When LPAE feature is supported, EAE, bit[31] selects translation descriptor format and, therefore, TTBCR format. > >> value &= ~((7 << 19) | (3 << 14) | (0xf << 3)); >> + } else if (arm_feature(env, ARM_FEATURE_TRUSTZONE)) { >> + value &= 0x37; >> } else { >> value &= 7; >> } > There are a few magic numbers in the patch probably worth macrofiying. As I can see, magic numbers are widely used through all of this file to represent CP register fields and other things. Maybe the macrofying should be done separately from this patch series? > > Regards, > Peter > >> -- >> 1.7.9.5 >> >> > Best regards, Sergey Fedorov