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Sender: Richard Henderson <rth7680@gmail.com>
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Date: Fri, 06 Dec 2013 11:47:43 +1300
From: Richard Henderson <rth@twiddle.net>
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Subject: Re: [Qemu-devel] [PATCH 04/13] target-arm: A64: add support for EXTR
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To: Peter Maydell <peter.maydell@linaro.org>, qemu-devel@nongnu.org
Cc: patches@linaro.org, Michael Matz <matz@suse.de>, Claudio Fontana <claudio.fontana@linaro.org>, Dirk Mueller <dmueller@suse.de>, Will Newton <will.newton@linaro.org>, Laurent Desnogues <laurent.desnogues@gmail.com>, =?ISO-8859-1?Q?Alex_Benn=E9e?= <alex.bennee@linaro.org>, kvmarm@lists.cs.columbia.edu, Christoffer Dall <christoffer.dall@linaro.org>

On 12/06/2013 10:51 AM, Peter Maydell wrote:
> From: Alexander Graf <agraf@suse.de>
> 
> This patch adds emulation support for the EXTR instruction.
> 
> Signed-off-by: Alexander Graf <agraf@suse.de>
> 
> [claudio: adapted for new decoder, removed a few temporaries,
>           fixed the 32bit bug, added checks for more
>           unallocated cases]
> 
> Signed-off-by: Claudio Fontana <claudio.fontana@linaro.org>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>  target-arm/translate-a64.c |   48 ++++++++++++++++++++++++++++++++++++++++++--
>  1 file changed, 46 insertions(+), 2 deletions(-)

Reviewed-by: Richard Henderson <rth@twiddle.net>

> +            tcg_rm = read_cpu_reg(s, rm, sf);
> +            tcg_rn = read_cpu_reg(s, rn, sf);
> +            tcg_gen_shri_i64(tcg_rm, tcg_rm, imm);
> +            tcg_gen_shli_i64(tcg_rn, tcg_rn, bitsize - imm);
> +            tcg_gen_or_i64(tcg_rd, tcg_rm, tcg_rn);
> +            if (!sf) {
> +                tcg_gen_ext32u_i64(tcg_rd, tcg_rd);
> +            }

OPTME: If Rm==Rn, this is a rotate.


r~