Re: [Qemu-devel] [PATCH v2 01/13] target-arm: A64: add support for conditional select

[Richard Henderson <rth@twiddle.net>]

On 12/07/2013 02:19 AM, Peter Maydell wrote:
> +    tcg_rd = cpu_reg(s, rd);
> +
> +    if (cond >= 0x0e) { /* condition "always" */
> +        tcg_src = read_cpu_reg(s, rn, sf);
> +        tcg_gen_mov_i64(tcg_rd, tcg_src);
> +    } else {
> +        /* OPTME: we could use movcond here, at the cost of duplicating
> +         * a lot of the arm_gen_test_cc() logic.
> +         */
> +        int label_match = gen_new_label();
> +        int label_continue = gen_new_label();
> +
> +        arm_gen_test_cc(cond, label_match);
> +        /* nomatch: */
> +        tcg_src = cpu_reg(s, rm);

Sorry for missing this in the first round: For the silly corner case of Rd ==
XZR, tcg_rd is dead after the branch.

We could either move the tcg_rd assignment down into each basic block with the
assignment to tcg_src, or simply add

    if (rd == 31) {
        /* silly no-op write; until we use movcond we must special-case
           this to avoid a dead temporary across basic blocks.  */
        return;
    }

Either solution is ok by me.


r~