All of lore.kernel.org
 help / color / mirror / Atom feed
From: Ruchika <ruchika.k@servergy.com>
To: linux-pci@vger.kernel.org
Subject: questions: second of the 2 pcie controllers does not scan the bus.
Date: Fri, 06 Dec 2013 18:20:32 -0600	[thread overview]
Message-ID: <52A269D0.2020303@servergy.com> (raw)

Hi,
I am working with an Soc with multiple PCIE controllers.
I need to have 2 configured properly.

In uboot I have no problems scanning and discovering what is connected 
to both controllers/PCI bridges.
PCIE1 :
PCIE2:

For both PCIE1/2 uboot sets up the Primary, secondary and Subordinate 
bus numbers to 0,1,1 respectively.

When linux boots up and probes the controllers, PCIE1 is probed and the 
bridge scanned properly but PCIE2 is probed at the bridge but not 
attempted a scan.
I see this message
"pci 0001:02:00.0: bridge configuration invalid ([bus 01-01]), reconfiguring
"

I updated uboot to set the secondary and subordinate numbers to 2 (left 
the primary number to 0) and a subsequent kernel boot scanned the bus 
for PCIE2 successfully.
I found these numbers to be very critical since the device tree blob 
(bus-range) for pci is also based off these.

I'd like to get a good fix and get better understanding of the problem. 
If there are any pointers someone could provide it would be awesome.

Thank you
Regards
Ruchika

-- 
Regards,
Ruchika Kharwar | Validation engineer
Servergy, Inc. | Save Energy. Work Smart. ®
M (832) 276 9309| E ruchika.k@servergy.com
www.servergy.com

             reply	other threads:[~2013-12-07  0:20 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-12-07  0:20 Ruchika [this message]
  -- strict thread matches above, loose matches on Subject: below --
2013-11-04 16:50 [PATCH 0/6] powerpc/math-emu: e500 SPE float emulation fixes Joseph S. Myers
2013-11-04 16:52 ` [PATCH 1/6] powerpc: fix exception clearing in e500 SPE float emulation Joseph S. Myers
2013-11-22 22:34   ` Scott Wood
2013-11-23  1:22     ` Joseph S. Myers
2013-12-07  0:32       ` Scott Wood
2013-12-07  0:48         ` questions: second of the 2 pcie controllers does not scan the bus Ruchika
2013-12-07 13:26           ` Ruchika
2013-12-09 22:50           ` Scott Wood

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=52A269D0.2020303@servergy.com \
    --to=ruchika.k@servergy.com \
    --cc=linux-pci@vger.kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.