From mboxrd@z Thu Jan 1 00:00:00 1970 From: York Sun Date: Mon, 9 Dec 2013 08:33:30 -0800 Subject: [U-Boot] [PATCH] powerpc/mpc85xx: Add support for single source clocking In-Reply-To: References: <1385616888-8627-1-git-send-email-Priyanka.Jain@freescale.com> Message-ID: <52A5F0DA.5060106@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 12/09/2013 01:28 AM, Priyanka.Jain at freescale.com wrote: > Hello York, > > I am not able to find mail which contains your comment on to undefined CONFIG_DDR_CLK_FREQ, so replying on original mail. > > ---- > You are right that we don't need to define CONFIG_DDR_CLK_FREQ in case of single source clocking. > But as T1040QDS supports both single source clocking and separate clocking (for DDR and sysclk) and we intend to keep single u-boot binary for both modes, we need a mechanism to decide clocking mode at runtime. We thought of implementing it via rcw bit. Please suggest if there is some other good way to do so. I am thinking this pseudo code #ifdef CONFIG_SINGLE_SOURCE_CLK if (test) sys_info->freq_ddrbus = CONFIG_SYS_CLK_FREQ; else #endif #ifdef CONFIG_DDR_CLK_FREQ sys_info->freq_ddrbus = CONFIG_DDR_CLK_FREQ; #else sys_info->freq_ddrbus = sysclk; #endif York