* [PATCH V2] ARM: tegra: fix pinctrl misconfiguration on Venic2
@ 2013-12-12 22:12 ` Stephen Warren
0 siblings, 0 replies; 8+ messages in thread
From: Stephen Warren @ 2013-12-12 22:12 UTC (permalink / raw)
To: Stephen Warren, ldewangan-DDmLM1+adcrQT0dZR+AlfA
Cc: Thierry Reding, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-tegra-u79uwXL29TY76Z2rM5mHXA, Stephen Warren
From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Other boards use PULL_NONE for their debug UART pins, and without this
change, the board doesn't accept any serial input.
Don't set the I2S port pins to tristate mode, or no audio signal will
be sent out.
Fixes: 605ae5804385 ("ARM: tegra: add default pinctrl nodes for Venice2")
Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
v2: Added fix for I2S port.
Laxman, can you please go through the whole pinctrl configuration for
Venice2 and make sure it's correct. Perhaps the best approach would be
to compare it against our downstream kernels for this board.
---
arch/arm/boot/dts/tegra124-venice2.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts
index 616759c3c7e5..b31e18798be7 100644
--- a/arch/arm/boot/dts/tegra124-venice2.dts
+++ b/arch/arm/boot/dts/tegra124-venice2.dts
@@ -40,7 +40,7 @@
nvidia,function = "i2s1";
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
- nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
dvfs_pwm_px0 {
nvidia,pins = "dvfs_pwm_px0";
@@ -250,7 +250,7 @@
"pu3";
nvidia,function = "uarta";
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
- nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
uart2_cts_n_pj5 {
--
1.8.1.5
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH V2] ARM: tegra: fix pinctrl misconfiguration on Venic2
@ 2013-12-12 22:12 ` Stephen Warren
0 siblings, 0 replies; 8+ messages in thread
From: Stephen Warren @ 2013-12-12 22:12 UTC (permalink / raw)
To: linux-arm-kernel
From: Stephen Warren <swarren@nvidia.com>
Other boards use PULL_NONE for their debug UART pins, and without this
change, the board doesn't accept any serial input.
Don't set the I2S port pins to tristate mode, or no audio signal will
be sent out.
Fixes: 605ae5804385 ("ARM: tegra: add default pinctrl nodes for Venice2")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
v2: Added fix for I2S port.
Laxman, can you please go through the whole pinctrl configuration for
Venice2 and make sure it's correct. Perhaps the best approach would be
to compare it against our downstream kernels for this board.
---
arch/arm/boot/dts/tegra124-venice2.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts
index 616759c3c7e5..b31e18798be7 100644
--- a/arch/arm/boot/dts/tegra124-venice2.dts
+++ b/arch/arm/boot/dts/tegra124-venice2.dts
@@ -40,7 +40,7 @@
nvidia,function = "i2s1";
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
- nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
dvfs_pwm_px0 {
nvidia,pins = "dvfs_pwm_px0";
@@ -250,7 +250,7 @@
"pu3";
nvidia,function = "uarta";
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
- nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
uart2_cts_n_pj5 {
--
1.8.1.5
^ permalink raw reply related [flat|nested] 8+ messages in thread[parent not found: <1386886322-2700-1-git-send-email-swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>]
* Re: [PATCH V2] ARM: tegra: fix pinctrl misconfiguration on Venic2
2013-12-12 22:12 ` Stephen Warren
@ 2013-12-13 6:25 ` Laxman Dewangan
-1 siblings, 0 replies; 8+ messages in thread
From: Laxman Dewangan @ 2013-12-13 6:25 UTC (permalink / raw)
To: Stephen Warren
Cc: Thierry Reding,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Stephen Warren
On Friday 13 December 2013 03:42 AM, Stephen Warren wrote:
> From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>
> Other boards use PULL_NONE for their debug UART pins, and without this
> change, the board doesn't accept any serial input.
>
> Don't set the I2S port pins to tristate mode, or no audio signal will
> be sent out.
>
> Fixes: 605ae5804385 ("ARM: tegra: add default pinctrl nodes for Venice2")
> Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> ---
> v2: Added fix for I2S port.
>
> Laxman, can you please go through the whole pinctrl configuration for
> Venice2 and make sure it's correct. Perhaps the best approach would be
> to compare it against our downstream kernels for this board.
The patch is generated based on downstream ref platforms setting,
Let me again check with very similar board in dowsntream.
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH V2] ARM: tegra: fix pinctrl misconfiguration on Venic2
@ 2013-12-13 6:25 ` Laxman Dewangan
0 siblings, 0 replies; 8+ messages in thread
From: Laxman Dewangan @ 2013-12-13 6:25 UTC (permalink / raw)
To: linux-arm-kernel
On Friday 13 December 2013 03:42 AM, Stephen Warren wrote:
> From: Stephen Warren <swarren@nvidia.com>
>
> Other boards use PULL_NONE for their debug UART pins, and without this
> change, the board doesn't accept any serial input.
>
> Don't set the I2S port pins to tristate mode, or no audio signal will
> be sent out.
>
> Fixes: 605ae5804385 ("ARM: tegra: add default pinctrl nodes for Venice2")
> Signed-off-by: Stephen Warren <swarren@nvidia.com>
> ---
> v2: Added fix for I2S port.
>
> Laxman, can you please go through the whole pinctrl configuration for
> Venice2 and make sure it's correct. Perhaps the best approach would be
> to compare it against our downstream kernels for this board.
The patch is generated based on downstream ref platforms setting,
Let me again check with very similar board in dowsntream.
^ permalink raw reply [flat|nested] 8+ messages in thread[parent not found: <52AAA870.4090609-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>]
* Re: [PATCH V2] ARM: tegra: fix pinctrl misconfiguration on Venic2
2013-12-13 6:25 ` Laxman Dewangan
@ 2013-12-13 16:59 ` Stephen Warren
-1 siblings, 0 replies; 8+ messages in thread
From: Stephen Warren @ 2013-12-13 16:59 UTC (permalink / raw)
To: Laxman Dewangan
Cc: Thierry Reding,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Stephen Warren
On 12/12/2013 11:25 PM, Laxman Dewangan wrote:
> On Friday 13 December 2013 03:42 AM, Stephen Warren wrote:
>> From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>>
>> Other boards use PULL_NONE for their debug UART pins, and without this
>> change, the board doesn't accept any serial input.
>>
>> Don't set the I2S port pins to tristate mode, or no audio signal will
>> be sent out.
>>
>> Fixes: 605ae5804385 ("ARM: tegra: add default pinctrl nodes for Venice2")
>> Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>> ---
>> v2: Added fix for I2S port.
>>
>> Laxman, can you please go through the whole pinctrl configuration for
>> Venice2 and make sure it's correct. Perhaps the best approach would be
>> to compare it against our downstream kernels for this board.
>
> The patch is generated based on downstream ref platforms setting,
> Let me again check with very similar board in dowsntream.
Oh, you mean this isn't a pinctrl configuration for Venice2 then? As you
know, we do have a separate downstream kernel with full Venice2 support;
you should use that as a reference.
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH V2] ARM: tegra: fix pinctrl misconfiguration on Venic2
@ 2013-12-13 16:59 ` Stephen Warren
0 siblings, 0 replies; 8+ messages in thread
From: Stephen Warren @ 2013-12-13 16:59 UTC (permalink / raw)
To: linux-arm-kernel
On 12/12/2013 11:25 PM, Laxman Dewangan wrote:
> On Friday 13 December 2013 03:42 AM, Stephen Warren wrote:
>> From: Stephen Warren <swarren@nvidia.com>
>>
>> Other boards use PULL_NONE for their debug UART pins, and without this
>> change, the board doesn't accept any serial input.
>>
>> Don't set the I2S port pins to tristate mode, or no audio signal will
>> be sent out.
>>
>> Fixes: 605ae5804385 ("ARM: tegra: add default pinctrl nodes for Venice2")
>> Signed-off-by: Stephen Warren <swarren@nvidia.com>
>> ---
>> v2: Added fix for I2S port.
>>
>> Laxman, can you please go through the whole pinctrl configuration for
>> Venice2 and make sure it's correct. Perhaps the best approach would be
>> to compare it against our downstream kernels for this board.
>
> The patch is generated based on downstream ref platforms setting,
> Let me again check with very similar board in dowsntream.
Oh, you mean this isn't a pinctrl configuration for Venice2 then? As you
know, we do have a separate downstream kernel with full Venice2 support;
you should use that as a reference.
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH V2] ARM: tegra: fix pinctrl misconfiguration on Venic2
2013-12-12 22:12 ` Stephen Warren
@ 2013-12-13 19:55 ` Thierry Reding
-1 siblings, 0 replies; 8+ messages in thread
From: Thierry Reding @ 2013-12-13 19:55 UTC (permalink / raw)
To: Stephen Warren
Cc: ldewangan-DDmLM1+adcrQT0dZR+AlfA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-tegra-u79uwXL29TY76Z2rM5mHXA, Stephen Warren
[-- Attachment #1: Type: text/plain, Size: 210 bytes --]
On Thu, Dec 12, 2013 at 03:12:02PM -0700, Stephen Warren wrote:
> From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Just in case you ever wanted to rebase this: s/Venic2/Venice2/
Thierry
[-- Attachment #2: Type: application/pgp-signature, Size: 836 bytes --]
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2013-12-13 19:55 UTC | newest]
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2013-12-12 22:12 [PATCH V2] ARM: tegra: fix pinctrl misconfiguration on Venic2 Stephen Warren
2013-12-12 22:12 ` Stephen Warren
[not found] ` <1386886322-2700-1-git-send-email-swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-12-13 6:25 ` Laxman Dewangan
2013-12-13 6:25 ` Laxman Dewangan
[not found] ` <52AAA870.4090609-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-12-13 16:59 ` Stephen Warren
2013-12-13 16:59 ` Stephen Warren
2013-12-13 19:55 ` Thierry Reding
2013-12-13 19:55 ` Thierry Reding
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