From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36775) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VsYT6-0003Yl-Te for qemu-devel@nongnu.org; Mon, 16 Dec 2013 08:44:26 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VsYT0-0001Mi-Uc for qemu-devel@nongnu.org; Mon, 16 Dec 2013 08:44:20 -0500 Received: from cantor2.suse.de ([195.135.220.15]:39697 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VsYT0-0001Md-Oe for qemu-devel@nongnu.org; Mon, 16 Dec 2013 08:44:14 -0500 Message-ID: <52AF03AA.2080005@suse.de> Date: Mon, 16 Dec 2013 14:44:10 +0100 From: =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= MIME-Version: 1.0 References: <1387181170-23267-1-git-send-email-edgar.iglesias@gmail.com> <1387181170-23267-23-git-send-email-edgar.iglesias@gmail.com> <52AEF641.7050401@suse.de> In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH v1 22/22] petalogix-ml605: Make the LMB visible only to the CPU List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: Eduardo Habkost , Igor Mammedov , pcrost@xilinx.com, QEMU Developers , Blue Swirl , Anthony Liguori , Paolo Bonzini , "Edgar E. Iglesias" , Aurelien Jarno , Richard Henderson Am 16.12.2013 14:29, schrieb Peter Maydell: > On 16 December 2013 12:46, Andreas F=C3=A4rber wrote= : >> TCG loads/saves should always have a CPU[Arch]State associated. Would = it >> work to always alias the system MemoryRegion again at cpu.c level with >> lowest priority for range [0,UINT64_MAX] and let derived CPUs do per-C= PU >> MemoryRegions by adding MemoryRegions with higher priority? >=20 > I think that we should definitely not have individual CPUs > looking at the system memory region directly. Well, overall the whole MemoryRegion API is an abstraction, and the system MemoryRegion is where SysBus maps its devices, so we can't get rid of it tomorrow just yet. I had compatibility with today's code in mind, Edgar apparently even more so, and I think we do need some container for memory accessible to all CPUs to not force adding all devices per CPU. The PC is still the most widely used machine in QEMU and per-CPU devices would probably be APICs whereas I imagine "all the rest" still in the big bucket whatever we name it. Andreas --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=C3=BCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=C3=B6rffer; HRB 16746 AG N=C3=BC= rnberg