diff for duplicates of <52B1568F.1050305@gmail.com> diff --git a/a/1.txt b/N1/1.txt index 95e3d28..91525d1 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -9,7 +9,7 @@ On 12/12/2013 03:57 PM, Hiroshi Doyu wrote: > more readable by using names instead of magic numbers. For HOTRESET > bit shifting we need another conversion table, which will come later. > -> Signed-off-by: Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> +> Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> > --- > v6: > Use 0xffffffff instead of ~0UL since dtc expand this to ~0ULL. @@ -22,7 +22,7 @@ On 12/12/2013 03:57 PM, Hiroshi Doyu wrote: > added. > [PATCHv3 15/19] ARM: tegra: Create a DT header defining SWGROUP ID > -> Signed-off-by: Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> +> Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> > --- > include/dt-bindings/memory/tegra-swgroup.h | 50 ++++++++++++++++++++++++++++++ > 1 file changed, 50 insertions(+) diff --git a/a/content_digest b/N1/content_digest index b99ebd1..a6d857a 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,25 +1,9 @@ "ref\01386835033-4701-1-git-send-email-hdoyu@nvidia.com\0" "ref\01386835033-4701-7-git-send-email-hdoyu@nvidia.com\0" - "ref\01386835033-4701-7-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org\0" - "From\0Mark Zhang <nvmarkzhang-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0" - "Subject\0Re: [PATCHv7 06/12] ARM: tegra: create a DT header defining SWGROUP ID\0" + "From\0nvmarkzhang@gmail.com (Mark Zhang)\0" + "Subject\0[PATCHv7 06/12] ARM: tegra: create a DT header defining SWGROUP ID\0" "Date\0Wed, 18 Dec 2013 16:02:23 +0800\0" - "To\0Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>" - Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> - swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org - will.deacon-5wv7dgnIgG8@public.gmane.org - grant.likely-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org - thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org - robherring2-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org - " joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org\0" - "Cc\0mark.rutland-5wv7dgnIgG8@public.gmane.org" - devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org - galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org - linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - " linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On 12/12/2013 03:57 PM, Hiroshi Doyu wrote:\n" @@ -33,7 +17,7 @@ "> more readable by using names instead of magic numbers. For HOTRESET\n" "> bit shifting we need another conversion table, which will come later.\n" "> \n" - "> Signed-off-by: Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" + "> Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>\n" "> ---\n" "> v6:\n" "> Use 0xffffffff instead of ~0UL since dtc expand this to ~0ULL.\n" @@ -46,7 +30,7 @@ "> added.\n" "> [PATCHv3 15/19] ARM: tegra: Create a DT header defining SWGROUP ID\n" "> \n" - "> Signed-off-by: Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" + "> Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>\n" "> ---\n" "> include/dt-bindings/memory/tegra-swgroup.h | 50 ++++++++++++++++++++++++++++++\n" "> 1 file changed, 50 insertions(+)\n" @@ -121,4 +105,4 @@ "> +#endif /* _DT_BINDINGS_MEMORY_TEGRA_SWGROUP_H */\n" > -d7e8fe2b4c4bde37cac302197946f1648663188aab5cddd49e500aabd4221128 +e2a0ff4bf663decd979b2b75f02c6fd0d3a4cce9370075f83eca3ca330787f64
diff --git a/a/1.txt b/N2/1.txt index 95e3d28..91525d1 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -9,7 +9,7 @@ On 12/12/2013 03:57 PM, Hiroshi Doyu wrote: > more readable by using names instead of magic numbers. For HOTRESET > bit shifting we need another conversion table, which will come later. > -> Signed-off-by: Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> +> Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> > --- > v6: > Use 0xffffffff instead of ~0UL since dtc expand this to ~0ULL. @@ -22,7 +22,7 @@ On 12/12/2013 03:57 PM, Hiroshi Doyu wrote: > added. > [PATCHv3 15/19] ARM: tegra: Create a DT header defining SWGROUP ID > -> Signed-off-by: Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> +> Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> > --- > include/dt-bindings/memory/tegra-swgroup.h | 50 ++++++++++++++++++++++++++++++ > 1 file changed, 50 insertions(+) diff --git a/a/content_digest b/N2/content_digest index b99ebd1..ed00133 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,25 +1,24 @@ "ref\01386835033-4701-1-git-send-email-hdoyu@nvidia.com\0" "ref\01386835033-4701-7-git-send-email-hdoyu@nvidia.com\0" - "ref\01386835033-4701-7-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org\0" - "From\0Mark Zhang <nvmarkzhang-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0" + "From\0Mark Zhang <nvmarkzhang@gmail.com>\0" "Subject\0Re: [PATCHv7 06/12] ARM: tegra: create a DT header defining SWGROUP ID\0" "Date\0Wed, 18 Dec 2013 16:02:23 +0800\0" - "To\0Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>" - Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> - swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org - will.deacon-5wv7dgnIgG8@public.gmane.org - grant.likely-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org - thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org - robherring2-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org - " joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org\0" - "Cc\0mark.rutland-5wv7dgnIgG8@public.gmane.org" - devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org - galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org - linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - " linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org\0" + "To\0Hiroshi Doyu <hdoyu@nvidia.com>" + Stephen Warren <swarren@wwwdotorg.org> + swarren@nvidia.com + will.deacon@arm.com + grant.likely@linaro.org + thierry.reding@gmail.com + robherring2@gmail.com + " joro@8bytes.org\0" + "Cc\0mark.rutland@arm.com" + devicetree@vger.kernel.org + lorenzo.pieralisi@arm.com + linux-kernel@vger.kernel.org + iommu@lists.linux-foundation.org + galak@codeaurora.org + linux-tegra@vger.kernel.org + " linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On 12/12/2013 03:57 PM, Hiroshi Doyu wrote:\n" @@ -33,7 +32,7 @@ "> more readable by using names instead of magic numbers. For HOTRESET\n" "> bit shifting we need another conversion table, which will come later.\n" "> \n" - "> Signed-off-by: Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" + "> Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>\n" "> ---\n" "> v6:\n" "> Use 0xffffffff instead of ~0UL since dtc expand this to ~0ULL.\n" @@ -46,7 +45,7 @@ "> added.\n" "> [PATCHv3 15/19] ARM: tegra: Create a DT header defining SWGROUP ID\n" "> \n" - "> Signed-off-by: Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" + "> Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>\n" "> ---\n" "> include/dt-bindings/memory/tegra-swgroup.h | 50 ++++++++++++++++++++++++++++++\n" "> 1 file changed, 50 insertions(+)\n" @@ -121,4 +120,4 @@ "> +#endif /* _DT_BINDINGS_MEMORY_TEGRA_SWGROUP_H */\n" > -d7e8fe2b4c4bde37cac302197946f1648663188aab5cddd49e500aabd4221128 +2f045fa47a704f244eefb3f3e9c6f2d631b29d99bf21c3710aefb9b7a874a0ed
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