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From: bilhuang <bilhuang@nvidia.com>
To: Viresh Kumar <viresh.kumar@linaro.org>
Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>,
	Stephen Warren <swarren@wwwdotorg.org>,
	"thierry.reding@gmail.com" <thierry.reding@gmail.com>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	"cpufreq@vger.kernel.org" <cpufreq@vger.kernel.org>,
	"linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>,
	"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>
Subject: Re: [PATCH v3 2/2] cpufreq: tegra: Re-model Tegra cpufreq driver
Date: Wed, 18 Dec 2013 19:33:09 +0800	[thread overview]
Message-ID: <52B187F5.7020105@nvidia.com> (raw)
In-Reply-To: <CAKohpom0n8P8goQnsgBnWJwyqCVv_FRX3xKvO1yFW0VUMpMW8w@mail.gmail.com>

On 12/18/2013 07:11 PM, Viresh Kumar wrote:
> On 17 December 2013 16:22, bilhuang <bilhuang@nvidia.com> wrote:
>> Tegra20 DVFS is a little bit complicated due to the fact that we can't scale
>> VDD_CPU directly, there are constraints or relationship to other power rails
>> so I don't think it is a good idea to use generic cpufreq-cpu0 driver if
>> we're going to support voltage scaling.
>
> But why can't we handle that in a CPU specific regulator code?
>
cpufreq-cpu0 driver will call regulator_set_voltage_tol() directly 
according to the pre-defined OPP freq/volt pairs, the regulator drivers 
could be shared by other SoC so is not suitable to handle this, or do I 
misunderstand?

  reply	other threads:[~2013-12-18 11:33 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-12-05  7:44 [PATCH v3 0/2] Remodel Tegra cpufreq drivers to support Tegra series SoC Bill Huang
2013-12-05  7:44 ` Bill Huang
2013-12-05  7:44 ` [PATCH v3 1/2] cpufreq: tegra: Call tegra_cpufreq_init() specifically in machine code Bill Huang
2013-12-05  7:44   ` Bill Huang
2013-12-05 22:54   ` Stephen Warren
2013-12-09  8:41     ` bilhuang
2013-12-17  6:31   ` Viresh Kumar
2013-12-17 10:48     ` bilhuang
2013-12-05  7:44 ` [PATCH v3 2/2] cpufreq: tegra: Re-model Tegra cpufreq driver Bill Huang
2013-12-05  7:44   ` Bill Huang
     [not found]   ` <1386229462-3474-3-git-send-email-bilhuang-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-12-05 23:04     ` Stephen Warren
2013-12-05 23:04       ` Stephen Warren
2013-12-09  8:44       ` bilhuang
2013-12-09 17:32         ` Stephen Warren
2013-12-11 11:18           ` bilhuang
2013-12-11 18:39             ` Stephen Warren
2013-12-17  6:54   ` Viresh Kumar
2013-12-17 10:52     ` bilhuang
2013-12-18 11:11       ` Viresh Kumar
2013-12-18 11:33         ` bilhuang [this message]
     [not found]           ` <52B187F5.7020105-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-12-18 14:39             ` Viresh Kumar
2013-12-18 14:39               ` Viresh Kumar
2013-12-19  5:26               ` bilhuang
     [not found]                 ` <52B28397.5010808-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-12-19  5:29                   ` Viresh Kumar
2013-12-19  5:29                     ` Viresh Kumar
2013-12-19  5:57                     ` bilhuang
     [not found] ` <1386229462-3474-1-git-send-email-bilhuang-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-12-17  6:26   ` [PATCH v3 0/2] Remodel Tegra cpufreq drivers to support Tegra series SoC Viresh Kumar
2013-12-17  6:26     ` Viresh Kumar
     [not found]     ` <CAKohponJAU20MQ92y4VaOXbsOOmxz6K=349KCq91c5=P=zQOQQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2013-12-17 10:47       ` bilhuang
2013-12-17 10:47         ` bilhuang
2013-12-17 10:51         ` Viresh Kumar

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