From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42093) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VtX7N-0004ZF-Vl for qemu-devel@nongnu.org; Thu, 19 Dec 2013 01:30:05 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VtX7G-0002FX-GO for qemu-devel@nongnu.org; Thu, 19 Dec 2013 01:29:57 -0500 Received: from mailout4.w1.samsung.com ([210.118.77.14]:34502) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VtX7G-0002FR-9i for qemu-devel@nongnu.org; Thu, 19 Dec 2013 01:29:50 -0500 Received: from eucpsbgm1.samsung.com (unknown [203.254.199.244]) by mailout4.w1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MY100LENJDNXV90@mailout4.w1.samsung.com> for qemu-devel@nongnu.org; Thu, 19 Dec 2013 06:29:47 +0000 (GMT) Message-id: <52B2925A.2030209@samsung.com> Date: Thu, 19 Dec 2013 10:29:46 +0400 From: Fedorov Sergey MIME-version: 1.0 References: <1386060535-15908-1-git-send-email-s.fedorov@samsung.com> <1386060535-15908-18-git-send-email-s.fedorov@samsung.com> In-reply-to: Content-type: text/plain; charset=ISO-8859-1; format=flowed Content-transfer-encoding: 7bit Subject: Re: [Qemu-devel] [RFC PATCH 17/21] target-arm: use c13_context field for CONTEXTIDR List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Crosthwaite Cc: Peter Maydell , a.basov@samsung.com, "qemu-devel@nongnu.org Developers" , Johannes Winter On 12/19/2013 08:31 AM, Peter Crosthwaite wrote: > On Tue, Dec 3, 2013 at 6:48 PM, Sergey Fedorov wrote: >> Use c13_context field instead of c13_fcse for CONTEXTIDR register >> definition. > This a standalone (I.E. not TZ related) bug? > > Regards, > peter Yes, I think so. Then I will submit this patch separately soon. Best regards, Sergey Fedorov > >> Signed-off-by: Sergey Fedorov >> --- >> target-arm/helper.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/target-arm/helper.c b/target-arm/helper.c >> index 9442e08..e1e9762 100644 >> --- a/target-arm/helper.c >> +++ b/target-arm/helper.c >> @@ -359,7 +359,7 @@ static const ARMCPRegInfo cp_reginfo[] = { >> .resetvalue = 0, .writefn = fcse_write, .raw_writefn = raw_write, }, >> { .name = "CONTEXTIDR", .cp = 15, .crn = 13, .crm = 0, .opc1 = 0, .opc2 = 1, >> .access = PL1_RW, .type = ARM_CP_BANKED, >> - .fieldoffset = offsetof(CPUARMState, cp15.c13_fcse), >> + .fieldoffset = offsetof(CPUARMState, cp15.c13_context), >> .resetvalue = 0, .writefn = contextidr_write, .raw_writefn = raw_write, }, >> /* ??? This covers not just the impdef TLB lockdown registers but also >> * some v7VMSA registers relating to TEX remap, so it is overly broad. >> -- >> 1.7.9.5 >> >>