From mboxrd@z Thu Jan 1 00:00:00 1970 From: Julien Grall Subject: Re: [PATCH] xen: arm: context switch the aux memory attribute registers Date: Fri, 20 Dec 2013 15:33:57 +0000 Message-ID: <52B46365.4000706@linaro.org> References: <1387552088-9976-1-git-send-email-ian.campbell@citrix.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1387552088-9976-1-git-send-email-ian.campbell@citrix.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Ian Campbell , xen-devel@lists.xen.org Cc: tim@xen.org, stefano.stabellini@eu.citrix.com List-Id: xen-devel@lists.xenproject.org On 12/20/2013 03:08 PM, Ian Campbell wrote: > We appear to have somehow missed these. Linux doesn't actually use them and > none of the processors I've looked at actually define any bits in them (so > they are UNK/SBZP) but it is good form to context switch them anyway. > > Signed-off-by: Ian Campbell Acked-by: Julien Grall > --- > xen/arch/arm/domain.c | 6 ++++++ > xen/include/asm-arm/cpregs.h | 2 ++ > xen/include/asm-arm/domain.h | 2 ++ > 3 files changed, 10 insertions(+) > > diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c > index 4099e88..124cccf 100644 > --- a/xen/arch/arm/domain.c > +++ b/xen/arch/arm/domain.c > @@ -98,8 +98,11 @@ static void ctxt_switch_from(struct vcpu *p) > #if defined(CONFIG_ARM_32) > p->arch.mair0 = READ_CP32(MAIR0); > p->arch.mair1 = READ_CP32(MAIR1); > + p->arch.amair0 = READ_CP32(AMAIR0); > + p->arch.amair1 = READ_CP32(AMAIR1); > #else > p->arch.mair = READ_SYSREG64(MAIR_EL1); > + p->arch.amair = READ_SYSREG64(AMAIR_EL1); > #endif > > /* Fault Status */ > @@ -177,8 +180,11 @@ static void ctxt_switch_to(struct vcpu *n) > #if defined(CONFIG_ARM_32) > WRITE_CP32(n->arch.mair0, MAIR0); > WRITE_CP32(n->arch.mair1, MAIR1); > + WRITE_CP32(n->arch.amair0, AMAIR0); > + WRITE_CP32(n->arch.amair1, AMAIR1); > #elif defined(CONFIG_ARM_64) > WRITE_SYSREG64(n->arch.mair, MAIR_EL1); > + WRITE_SYSREG64(n->arch.amair, AMAIR_EL1); > #endif > isb(); > > diff --git a/xen/include/asm-arm/cpregs.h b/xen/include/asm-arm/cpregs.h > index 29cd9d7..dcdbe47 100644 > --- a/xen/include/asm-arm/cpregs.h > +++ b/xen/include/asm-arm/cpregs.h > @@ -200,6 +200,8 @@ > #define MAIR1 p15,0,c10,c2,1 /* Memory Attribute Indirection Register 1 AKA NMRR */ > #define HMAIR0 p15,4,c10,c2,0 /* Hyp. Memory Attribute Indirection Register 0 */ > #define HMAIR1 p15,4,c10,c2,1 /* Hyp. Memory Attribute Indirection Register 1 */ > +#define AMAIR0 p15,0,c10,c3,0 /* Aux. Memory Attribute Indirection Register 0 */ > +#define AMAIR1 p15,0,c10,c3,1 /* Aux. Memory Attribute Indirection Register 1 */ > > /* CP15 CR11: DMA Operations for TCM Access */ > > diff --git a/xen/include/asm-arm/domain.h b/xen/include/asm-arm/domain.h > index e2202a6..bc20a15 100644 > --- a/xen/include/asm-arm/domain.h > +++ b/xen/include/asm-arm/domain.h > @@ -221,8 +221,10 @@ struct arch_vcpu > uint64_t par; > #ifdef CONFIG_ARM_32 > uint32_t mair0, mair1; > + uint32_t amair0, amair1; > #else > uint64_t mair; > + uint64_t amair; > #endif > > /* Control Registers */ > -- Julien Grall