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From: Richard Henderson <rth@twiddle.net>
To: Peter Maydell <peter.maydell@linaro.org>, qemu-devel@nongnu.org
Cc: patches@linaro.org, "Michael Matz" <matz@suse.de>,
	"Alexander Graf" <agraf@suse.de>,
	"Claudio Fontana" <claudio.fontana@linaro.org>,
	"Dirk Mueller" <dmueller@suse.de>,
	"Will Newton" <will.newton@linaro.org>,
	"Laurent Desnogues" <laurent.desnogues@gmail.com>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	kvmarm@lists.cs.columbia.edu,
	"Christoffer Dall" <christoffer.dall@linaro.org>
Subject: Re: [Qemu-devel] [PATCH 05/10] target-arm: A64: Add "Floating-point data-processing (3 source)" insns
Date: Mon, 30 Dec 2013 07:15:26 -0800	[thread overview]
Message-ID: <52C18E0E.1010707@twiddle.net> (raw)
In-Reply-To: <1388267351-31818-6-git-send-email-peter.maydell@linaro.org>

On 12/28/2013 01:49 PM, Peter Maydell wrote:
> +    /* These are fused multiply-add, and must be done as one
> +     * floating point operation with no rounding between the
> +     * multiplication and addition steps.
> +     * NB that doing the negations here as separate steps is
> +     * correct : an input NaN should come out with its sign bit
> +     * flipped if it is a negated-input.
> +     */
> +    if (o1 == true) {
> +        gen_helper_vfp_negs(tcg_op3, tcg_op3);
> +    }
> +
> +    if (o0 != o1) {
> +        gen_helper_vfp_negs(tcg_op1, tcg_op1);
> +    }
> +
> +    gen_helper_vfp_muladds(tcg_res, tcg_op1, tcg_op2, tcg_op3, fpst);

Do you really get the wrong result passing the appropriate
float_muladd_negate_* constant?

I realize that the A32 target doesn't do this either, but shouldn't that be
cleaned up?  It's certainly confusing to the reader, wondering why they aren't
used...


r~

  reply	other threads:[~2013-12-30 15:15 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-12-28 21:49 [Qemu-devel] [PATCH 00/10] A64 decoder patchset 5: most floating point Peter Maydell
2013-12-28 21:49 ` [Qemu-devel] [PATCH 01/10] target-arm: A64: Add support for dumping AArch64 VFP register state Peter Maydell
2013-12-30 14:58   ` Richard Henderson
2013-12-30 15:21     ` Peter Maydell
2013-12-28 21:49 ` [Qemu-devel] [PATCH 02/10] target-arm: A64: Fix vector register access on bigendian hosts Peter Maydell
2013-12-30 15:03   ` Richard Henderson
2013-12-30 15:28     ` Peter Maydell
2013-12-30 15:35       ` Richard Henderson
2013-12-28 21:49 ` [Qemu-devel] [PATCH 03/10] target-arm: Use VFP_BINOP macro for min, max, minnum, maxnum Peter Maydell
2013-12-30 15:04   ` Richard Henderson
2013-12-28 21:49 ` [Qemu-devel] [PATCH 04/10] target-arm: A64: Add "Floating-point data-processing (2 source)" insns Peter Maydell
2013-12-30 15:10   ` Richard Henderson
2013-12-28 21:49 ` [Qemu-devel] [PATCH 05/10] target-arm: A64: Add "Floating-point data-processing (3 " Peter Maydell
2013-12-30 15:15   ` Richard Henderson [this message]
2013-12-30 15:17     ` Richard Henderson
2013-12-28 21:49 ` [Qemu-devel] [PATCH 06/10] target-arm: A64: Add fmov (scalar, immediate) instruction Peter Maydell
2013-12-30 15:21   ` Richard Henderson
2013-12-28 21:49 ` [Qemu-devel] [PATCH 07/10] target-arm: A64: Add support for floating point compare Peter Maydell
2013-12-30 15:25   ` Richard Henderson
2013-12-28 21:49 ` [Qemu-devel] [PATCH 08/10] target-arm: A64: Add support for floating point conditional compare Peter Maydell
2013-12-30 15:27   ` Richard Henderson
2013-12-28 21:49 ` [Qemu-devel] [PATCH 09/10] target-arm: A64: Add support for floating point cond select Peter Maydell
2013-12-30 15:28   ` Richard Henderson
2013-12-28 21:49 ` [Qemu-devel] [PATCH 10/10] target-arm: Give the FPSCR rounding modes names Peter Maydell
2013-12-30 15:29   ` Richard Henderson

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