Re: [PATCH 2/5] arm: shmobile: r8a7790: Add SATA clock

[Valentine <valentine.barshak@cogentembedded.com>]

On 01/06/2014 05:25 AM, Kuninori Morimoto wrote:
>
> Hi Valentine
>
> Happy new year, and sorry for my late response

Thanks! No problem, hope you had great holidays!

>
>>>>> I will ask this to HW people, but maybe p_clk is fine here.
>>>>
>>>> Morimoto-san,
>>>> is there any news?
>>>>
>>>> It says "PLL in the Serial-ATA module" not the "Serial-ATA phy", but without
>>>> the clock map it's hard to say.
>>>>
>>>>> If you need to control CICREFN1_SATAx clocks,
>>>>> it should be defined as CLKDEV_ICK_ID() and use clk_xx() function
>>>>
>>>> If MSTP814/MSTP815 controls the internal SATA clocks, then I'm not sure how
>>>> to control the external CICREF[PN][01]_SATA ones.
>>>
>>> If my guess is correct the CICREF[PN][01]_SATA clock doesn't need to be
>>> controlled.
>>
>> I agree. Still the question remains whether it's OK to use p_clk here.
>
> According to HW guys, parent clock of SATA module is zs_clk.

Thanks!
I'll resend with series with the clocks updated.

>
> Best regards
> ---
> Kuninori Morimoto
>

Thanks,
Val.