From: b.brezillon@overkiz.com (boris brezillon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 01/13] clk: sunxi: register factors clocks behind composite
Date: Wed, 08 Jan 2014 10:30:48 +0100 [thread overview]
Message-ID: <52CD1AC8.9060801@overkiz.com> (raw)
In-Reply-To: <CAAoKrfo+xOoc=S2wJF9XWz3OJoCOG3jD_m5N3XTSWOY6c1LR7w@mail.gmail.com>
On 07/01/2014 18:47, Emilio L?pez wrote:
> Hi Boris,
>
> [ Apologies if the email looks weird and for using a link; I'm not
> using my typical email client ]
>
>> I'm currently working on the sunxi NFC (Nand Flash Controller) driver
>> and I need to set the NAND clk (which is a mod0 clk type) rate.
>>
>> It seems that the composite clk fallbacks to the mux_hw's determine_rate
>> instead of calling the rate_hw's (or factors hw) round_rate, if rate_hw
>> does not implement determine_rate.
> That is to be expected; if you have a composite clock that has all
> fixed parents you'd not implement the determine_rate on the rate
> component but on the mux one.
>
> (...)
>
>> But anyway, I think there is a drawback in the way composite clk
>> implement the determine_rate handler.
>> Mike, shouldn't we choose the best parent (using mux) fullfilling the
>> rate_hw needs ?
> Someone using the composite clock may not want their clocks to start
> changing parents though. I believe it's easier and better to just
> implement determine_rate as on this patch on my tree (which I haven't
> sent yet, but it's literally the next in queue.)
>
> http://git.elopez.com.ar/linux/commits/5b4eb3ac406b9c98965714d40e8dd6da943d1ab0
>
> Let me know if that resolves your issue.
Yes, it works.
Thanks.
Can you submit it on LAKML so that I can state the dependency in my
NFC driver series ?
Best Regards,
Boris
>
> Cheers,
>
> Emilio
next prev parent reply other threads:[~2014-01-08 9:30 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-23 3:32 [PATCH v3 00/13] clk: sunxi: add PLL5 and PLL6 support Emilio López
2013-12-23 3:32 ` [PATCH v3 01/13] clk: sunxi: register factors clocks behind composite Emilio López
2014-01-07 16:56 ` boris brezillon
2014-01-07 17:47 ` Emilio López
2014-01-07 20:46 ` Boris Brezillon
2014-01-08 9:30 ` boris brezillon [this message]
2014-01-07 17:02 ` [RFC PATCH] clk: composite: support determine_rate using rate_ops->round_rate + mux_ops->set_parent Boris BREZILLON
2014-01-07 17:03 ` Boris BREZILLON
2014-01-14 20:41 ` Mike Turquette
2014-05-18 22:23 ` Heiko Stübner
2013-12-23 3:32 ` [PATCH v3 02/13] clk: sunxi: clean the magic number of mux parents Emilio López
2013-12-23 3:32 ` [PATCH v3 03/13] clk: sunxi: add gating support to PLL1 Emilio López
2013-12-23 3:32 ` [PATCH v3 04/13] ARM: sunxi: add PLL4 support Emilio López
2013-12-23 3:32 ` [PATCH v3 05/13] clk: sunxi: make factors_clk_setup return the clock it registers Emilio López
2013-12-23 3:32 ` [PATCH v3 06/13] clk: sunxi: add PLL5 and PLL6 support Emilio López
2013-12-23 3:32 ` [PATCH v3 07/13] ARM: " Emilio López
2013-12-23 3:32 ` [PATCH v3 08/13] clk: sunxi: mod0 support Emilio López
2013-12-23 3:32 ` [PATCH v3 09/13] clk: sunxi: support better factor DT nodes Emilio López
2013-12-23 3:32 ` [PATCH v3 10/13] ARM: sun4i: dt: mod0 clocks Emilio López
2013-12-23 3:32 ` [PATCH v3 11/13] ARM: sun5i: " Emilio López
2013-12-23 3:32 ` [PATCH v3 12/13] ARM: sun7i: " Emilio López
2013-12-23 3:32 ` [PATCH v3 13/13] ARM: sunxi: dt: add nodes for the mbus clock Emilio López
[not found] ` <20131223054401.22761.10523@quantum>
2013-12-23 13:22 ` [PATCH v3 00/13] clk: sunxi: add PLL5 and PLL6 support Emilio López
2013-12-23 19:37 ` Mike Turquette
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