From mboxrd@z Thu Jan  1 00:00:00 1970
From: York Sun <yorksun@freescale.com>
Date: Wed, 8 Jan 2014 10:30:07 -0800
Subject: [U-Boot] [PATCH] powerpc/mpc85xx: Revise workaround for DDR
	A003474
In-Reply-To: <1389205076-7502-1-git-send-email-yorksun@freescale.com>
References: <1389205076-7502-1-git-send-email-yorksun@freescale.com>
Message-ID: <52CD992F.5090805@freescale.com>
List-Id: <u-boot.lists.denx.de>
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
To: u-boot@lists.denx.de

On 01/08/2014 10:17 AM, York Sun wrote:
> Existing workaround only handles one RDIMM on reference design. In case
> two RDIMMs are used, the workaround requires two separate writes to
> DDR_SDRAM_MD_CNTL register.
> 
> This patch also restores two registers changed by the workaround.
> 
> Signed-off-by: York Sun <yorksun@freescale.com>

Ignore this patch. I made a typo on the subject. v2 is coming.

York