diff for duplicates of <52CEFCE3.1040701@arm.com> diff --git a/a/1.txt b/N1/1.txt index eb52f78..8b37a6e 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -4,10 +4,8 @@ On 09/01/14 19:31, Greg Kroah-Hartman wrote: >>> On Wed, Jan 08, 2014 at 07:26:06PM +0000, Sudeep Holla wrote: >>>> From: Sudeep Holla <sudeep.holla@arm.com> >>>> ->>>> This patch adds initial support for providing processor cache informat= -ion ->>>> to userspace through sysfs interface. This is based on x86 implementat= -ion +>>>> This patch adds initial support for providing processor cache information +>>>> to userspace through sysfs interface. This is based on x86 implementation >>>> and hence the interface is intended to be fully compatible. >>>> >>>> A per-cpu array of cache information maintained is used mainly for @@ -16,8 +14,7 @@ ion >>>> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> >>>> --- >>>> drivers/base/Makefile | 2 +- ->>>> drivers/base/cacheinfo.c | 296 +++++++++++++++++++++++++++++++++++++= -+++++++++ +>>>> drivers/base/cacheinfo.c | 296 ++++++++++++++++++++++++++++++++++++++++++++++ >>>> include/linux/cacheinfo.h | 43 +++++++ >>>> 3 files changed, 340 insertions(+), 1 deletion(-) >>>> create mode 100644 drivers/base/cacheinfo.c @@ -27,15 +24,15 @@ ion >>>> index 94e8a80..76f07c8 100644 >>>> --- a/drivers/base/Makefile >>>> +++ b/drivers/base/Makefile ->>>> @@ -4,7 +4,7 @@ obj-y=09=09=09:=3D core.o bus.o dd.o syscore.o \ ->>>> =09=09=09 driver.o class.o platform.o \ ->>>> =09=09=09 cpu.o firmware.o init.o map.o devres.o \ ->>>> =09=09=09 attribute_container.o transport_class.o \ ->>>> -=09=09=09 topology.o ->>>> +=09=09=09 topology.o cacheinfo.o ->>>> obj-$(CONFIG_DEVTMPFS)=09+=3D devtmpfs.o ->>>> obj-$(CONFIG_DMA_CMA) +=3D dma-contiguous.o ->>>> obj-y=09=09=09+=3D power/ +>>>> @@ -4,7 +4,7 @@ obj-y := core.o bus.o dd.o syscore.o \ +>>>> driver.o class.o platform.o \ +>>>> cpu.o firmware.o init.o map.o devres.o \ +>>>> attribute_container.o transport_class.o \ +>>>> - topology.o +>>>> + topology.o cacheinfo.o +>>>> obj-$(CONFIG_DEVTMPFS) += devtmpfs.o +>>>> obj-$(CONFIG_DMA_CMA) += dma-contiguous.o +>>>> obj-y += power/ >>>> diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c >>>> new file mode 100644 >>>> index 0000000..f436c31 @@ -50,14 +47,12 @@ ion >>>> + * >>>> + * Author: Sudeep Holla <sudeep.holla@arm.com> >>>> + * ->>>> + * This program is free software; you can redistribute it and/or modi= -fy +>>>> + * This program is free software; you can redistribute it and/or modify >>>> + * it under the terms of the GNU General Public License version 2 as >>>> + * published by the Free Software Foundation. >>>> + * >>>> + * This program is distributed "as is" WITHOUT ANY WARRANTY of any ->>>> + * kind, whether express or implied; without even the implied warrant= -y +>>>> + * kind, whether express or implied; without even the implied warranty >>>> + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >>>> + * GNU General Public License for more details. >>>> + */ @@ -75,21 +70,19 @@ y >>>> +#include <linux/sysfs.h> >>>> + >>>> +struct cache_attr { ->>>> +=09struct attribute attr; ->>>> +=09 ssize_t(*show) (unsigned int, unsigned short, char *); ->>>> +=09 ssize_t(*store) (unsigned int, unsigned short, const char *, size= -_t); +>>>> + struct attribute attr; +>>>> + ssize_t(*show) (unsigned int, unsigned short, char *); +>>>> + ssize_t(*store) (unsigned int, unsigned short, const char *, size_t); >>>> +}; >>>> + >>>> +/* pointer to kobject for cpuX/cache */ >>>> +static DEFINE_PER_CPU(struct kobject *, ci_cache_kobject); ->>>> +#define per_cpu_cache_kobject(cpu) (per_cpu(ci_cache_kobject, cpu= -)) +>>>> +#define per_cpu_cache_kobject(cpu) (per_cpu(ci_cache_kobject, cpu)) >>>> + >>>> +struct index_kobject { ->>>> +=09struct kobject kobj; ->>>> +=09unsigned int cpu; ->>>> +=09unsigned short index; +>>>> + struct kobject kobj; +>>>> + unsigned int cpu; +>>>> + unsigned short index; >>>> +}; >>>> + >>>> +static cpumask_t cache_dev_map; @@ -101,30 +94,27 @@ _t); >>> get a lot simpler when you do that. >>> >> ->> Yes I now understand device attribute group simplifies the code, but I t= -hink +>> Yes I now understand device attribute group simplifies the code, but I think >> kobjects are still needed as we need to track both cpu and cache index. >> By reusing only cpu device kobject, we can track cpu only. ->=20 +> > I don't understand, you are putting things under the cpu device object, > why do you care about a "cache" kobject? ->=20 +> Yes though the cache attributes are under cpu objects, it's hierarchical something like: /sys/devices/system/cpu/cpu<n>/cache/index<m>/<attribute_x> <attribute_x> is unique for each pair of (cpu<n>, index<m> -index is more like cache level, but with 2 indices if they are separate(I$,= -D$) +index is more like cache level, but with 2 indices if they are separate(I$,D$) ->> One thought I have is to make cache_info structure common to all archite= -cture +>> One thought I have is to make cache_info structure common to all architecture >> (for now its ARM specific) and introduce kobject in that similar to ia64 >> implementation. That even eliminates lot of weak functions defined. ->=20 +> > Please don't use raw kobjects if at all possible, it's not good for a > variety of reasons (no userspace events, have to roll your own code, > etc.) ->=20 +> Yes I understand, will try to explore other feasible solutions. Regards, diff --git a/a/content_digest b/N1/content_digest index 50ee8c2..4f252d6 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -3,18 +3,10 @@ "ref\020140108202707.GE8417@kroah.com\0" "ref\052CEF624.9020702@arm.com\0" "ref\020140109193121.GA14991@kroah.com\0" - "From\0Sudeep Holla <Sudeep.Holla@arm.com>\0" - "Subject\0Re: [PATCH RFC 1/3] drivers: base: support cpu cache information interface to userspace via sysfs\0" + "From\0Sudeep.Holla@arm.com (Sudeep Holla)\0" + "Subject\0[PATCH RFC 1/3] drivers: base: support cpu cache information interface to userspace via sysfs\0" "Date\0Thu, 09 Jan 2014 19:47:47 +0000\0" - "To\0Greg Kroah-Hartman <gregkh@linuxfoundation.org>\0" - "Cc\0devicetree@vger.kernel.org <devicetree@vger.kernel.org>" - Ashok Raj <ashok.raj@intel.com> - Rob Herring <robh@kernel.org> - x86@kernel.org <x86@kernel.org> - linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org> - Sudeep.Holla@arm.com - linuxppc-dev@lists.ozlabs.org <linuxppc-dev@lists.ozlabs.org> - " linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On 09/01/14 19:31, Greg Kroah-Hartman wrote:\n" @@ -23,10 +15,8 @@ ">>> On Wed, Jan 08, 2014 at 07:26:06PM +0000, Sudeep Holla wrote:\n" ">>>> From: Sudeep Holla <sudeep.holla@arm.com>\n" ">>>>\n" - ">>>> This patch adds initial support for providing processor cache informat=\n" - "ion\n" - ">>>> to userspace through sysfs interface. This is based on x86 implementat=\n" - "ion\n" + ">>>> This patch adds initial support for providing processor cache information\n" + ">>>> to userspace through sysfs interface. This is based on x86 implementation\n" ">>>> and hence the interface is intended to be fully compatible.\n" ">>>>\n" ">>>> A per-cpu array of cache information maintained is used mainly for\n" @@ -35,8 +25,7 @@ ">>>> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>\n" ">>>> ---\n" ">>>> drivers/base/Makefile | 2 +-\n" - ">>>> drivers/base/cacheinfo.c | 296 +++++++++++++++++++++++++++++++++++++=\n" - "+++++++++\n" + ">>>> drivers/base/cacheinfo.c | 296 ++++++++++++++++++++++++++++++++++++++++++++++\n" ">>>> include/linux/cacheinfo.h | 43 +++++++\n" ">>>> 3 files changed, 340 insertions(+), 1 deletion(-)\n" ">>>> create mode 100644 drivers/base/cacheinfo.c\n" @@ -46,15 +35,15 @@ ">>>> index 94e8a80..76f07c8 100644\n" ">>>> --- a/drivers/base/Makefile\n" ">>>> +++ b/drivers/base/Makefile\n" - ">>>> @@ -4,7 +4,7 @@ obj-y=09=09=09:=3D core.o bus.o dd.o syscore.o \\\n" - ">>>> =09=09=09 driver.o class.o platform.o \\\n" - ">>>> =09=09=09 cpu.o firmware.o init.o map.o devres.o \\\n" - ">>>> =09=09=09 attribute_container.o transport_class.o \\\n" - ">>>> -=09=09=09 topology.o\n" - ">>>> +=09=09=09 topology.o cacheinfo.o\n" - ">>>> obj-$(CONFIG_DEVTMPFS)=09+=3D devtmpfs.o\n" - ">>>> obj-$(CONFIG_DMA_CMA) +=3D dma-contiguous.o\n" - ">>>> obj-y=09=09=09+=3D power/\n" + ">>>> @@ -4,7 +4,7 @@ obj-y\t\t\t:= core.o bus.o dd.o syscore.o \\\n" + ">>>> \t\t\t driver.o class.o platform.o \\\n" + ">>>> \t\t\t cpu.o firmware.o init.o map.o devres.o \\\n" + ">>>> \t\t\t attribute_container.o transport_class.o \\\n" + ">>>> -\t\t\t topology.o\n" + ">>>> +\t\t\t topology.o cacheinfo.o\n" + ">>>> obj-$(CONFIG_DEVTMPFS)\t+= devtmpfs.o\n" + ">>>> obj-$(CONFIG_DMA_CMA) += dma-contiguous.o\n" + ">>>> obj-y\t\t\t+= power/\n" ">>>> diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c\n" ">>>> new file mode 100644\n" ">>>> index 0000000..f436c31\n" @@ -69,14 +58,12 @@ ">>>> + *\n" ">>>> + * Author: Sudeep Holla <sudeep.holla@arm.com>\n" ">>>> + *\n" - ">>>> + * This program is free software; you can redistribute it and/or modi=\n" - "fy\n" + ">>>> + * This program is free software; you can redistribute it and/or modify\n" ">>>> + * it under the terms of the GNU General Public License version 2 as\n" ">>>> + * published by the Free Software Foundation.\n" ">>>> + *\n" ">>>> + * This program is distributed \"as is\" WITHOUT ANY WARRANTY of any\n" - ">>>> + * kind, whether express or implied; without even the implied warrant=\n" - "y\n" + ">>>> + * kind, whether express or implied; without even the implied warranty\n" ">>>> + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n" ">>>> + * GNU General Public License for more details.\n" ">>>> + */\n" @@ -94,21 +81,19 @@ ">>>> +#include <linux/sysfs.h>\n" ">>>> +\n" ">>>> +struct cache_attr {\n" - ">>>> +=09struct attribute attr;\n" - ">>>> +=09 ssize_t(*show) (unsigned int, unsigned short, char *);\n" - ">>>> +=09 ssize_t(*store) (unsigned int, unsigned short, const char *, size=\n" - "_t);\n" + ">>>> +\tstruct attribute attr;\n" + ">>>> +\t ssize_t(*show) (unsigned int, unsigned short, char *);\n" + ">>>> +\t ssize_t(*store) (unsigned int, unsigned short, const char *, size_t);\n" ">>>> +};\n" ">>>> +\n" ">>>> +/* pointer to kobject for cpuX/cache */\n" ">>>> +static DEFINE_PER_CPU(struct kobject *, ci_cache_kobject);\n" - ">>>> +#define per_cpu_cache_kobject(cpu) (per_cpu(ci_cache_kobject, cpu=\n" - "))\n" + ">>>> +#define per_cpu_cache_kobject(cpu) (per_cpu(ci_cache_kobject, cpu))\n" ">>>> +\n" ">>>> +struct index_kobject {\n" - ">>>> +=09struct kobject kobj;\n" - ">>>> +=09unsigned int cpu;\n" - ">>>> +=09unsigned short index;\n" + ">>>> +\tstruct kobject kobj;\n" + ">>>> +\tunsigned int cpu;\n" + ">>>> +\tunsigned short index;\n" ">>>> +};\n" ">>>> +\n" ">>>> +static cpumask_t cache_dev_map;\n" @@ -120,33 +105,30 @@ ">>> get a lot simpler when you do that.\n" ">>>\n" ">>\n" - ">> Yes I now understand device attribute group simplifies the code, but I t=\n" - "hink\n" + ">> Yes I now understand device attribute group simplifies the code, but I think\n" ">> kobjects are still needed as we need to track both cpu and cache index.\n" ">> By reusing only cpu device kobject, we can track cpu only.\n" - ">=20\n" + "> \n" "> I don't understand, you are putting things under the cpu device object,\n" "> why do you care about a \"cache\" kobject?\n" - ">=20\n" + "> \n" "Yes though the cache attributes are under cpu objects, it's hierarchical\n" "something like:\n" "/sys/devices/system/cpu/cpu<n>/cache/index<m>/<attribute_x>\n" "<attribute_x> is unique for each pair of (cpu<n>, index<m>\n" - "index is more like cache level, but with 2 indices if they are separate(I$,=\n" - "D$)\n" + "index is more like cache level, but with 2 indices if they are separate(I$,D$)\n" "\n" - ">> One thought I have is to make cache_info structure common to all archite=\n" - "cture\n" + ">> One thought I have is to make cache_info structure common to all architecture\n" ">> (for now its ARM specific) and introduce kobject in that similar to ia64\n" ">> implementation. That even eliminates lot of weak functions defined.\n" - ">=20\n" + "> \n" "> Please don't use raw kobjects if at all possible, it's not good for a\n" "> variety of reasons (no userspace events, have to roll your own code,\n" "> etc.)\n" - ">=20\n" + "> \n" "Yes I understand, will try to explore other feasible solutions.\n" "\n" "Regards,\n" Sudeep -75e8691a85e9b3e26b1151607dadd6e00c8ba0a0f7ae20236844537b4c01743c +710d7f84f69366298e094fb51ca6cef80ff1716b31486ce44dfbe1e0fbdb5482
diff --git a/a/1.txt b/N2/1.txt index eb52f78..c38d3dd 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -2,22 +2,19 @@ On 09/01/14 19:31, Greg Kroah-Hartman wrote: > On Thu, Jan 09, 2014 at 07:19:00PM +0000, Sudeep Holla wrote: >> On 08/01/14 20:27, Greg Kroah-Hartman wrote: >>> On Wed, Jan 08, 2014 at 07:26:06PM +0000, Sudeep Holla wrote: ->>>> From: Sudeep Holla <sudeep.holla@arm.com> +>>>> From: Sudeep Holla <sudeep.holla-5wv7dgnIgG8@public.gmane.org> >>>> ->>>> This patch adds initial support for providing processor cache informat= -ion ->>>> to userspace through sysfs interface. This is based on x86 implementat= -ion +>>>> This patch adds initial support for providing processor cache information +>>>> to userspace through sysfs interface. This is based on x86 implementation >>>> and hence the interface is intended to be fully compatible. >>>> >>>> A per-cpu array of cache information maintained is used mainly for >>>> sysfs-related book keeping. >>>> ->>>> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> +>>>> Signed-off-by: Sudeep Holla <sudeep.holla-5wv7dgnIgG8@public.gmane.org> >>>> --- >>>> drivers/base/Makefile | 2 +- ->>>> drivers/base/cacheinfo.c | 296 +++++++++++++++++++++++++++++++++++++= -+++++++++ +>>>> drivers/base/cacheinfo.c | 296 ++++++++++++++++++++++++++++++++++++++++++++++ >>>> include/linux/cacheinfo.h | 43 +++++++ >>>> 3 files changed, 340 insertions(+), 1 deletion(-) >>>> create mode 100644 drivers/base/cacheinfo.c @@ -27,15 +24,15 @@ ion >>>> index 94e8a80..76f07c8 100644 >>>> --- a/drivers/base/Makefile >>>> +++ b/drivers/base/Makefile ->>>> @@ -4,7 +4,7 @@ obj-y=09=09=09:=3D core.o bus.o dd.o syscore.o \ ->>>> =09=09=09 driver.o class.o platform.o \ ->>>> =09=09=09 cpu.o firmware.o init.o map.o devres.o \ ->>>> =09=09=09 attribute_container.o transport_class.o \ ->>>> -=09=09=09 topology.o ->>>> +=09=09=09 topology.o cacheinfo.o ->>>> obj-$(CONFIG_DEVTMPFS)=09+=3D devtmpfs.o ->>>> obj-$(CONFIG_DMA_CMA) +=3D dma-contiguous.o ->>>> obj-y=09=09=09+=3D power/ +>>>> @@ -4,7 +4,7 @@ obj-y := core.o bus.o dd.o syscore.o \ +>>>> driver.o class.o platform.o \ +>>>> cpu.o firmware.o init.o map.o devres.o \ +>>>> attribute_container.o transport_class.o \ +>>>> - topology.o +>>>> + topology.o cacheinfo.o +>>>> obj-$(CONFIG_DEVTMPFS) += devtmpfs.o +>>>> obj-$(CONFIG_DMA_CMA) += dma-contiguous.o +>>>> obj-y += power/ >>>> diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c >>>> new file mode 100644 >>>> index 0000000..f436c31 @@ -48,16 +45,14 @@ ion >>>> + * Copyright (C) 2013 ARM Ltd. >>>> + * All Rights Reserved >>>> + * ->>>> + * Author: Sudeep Holla <sudeep.holla@arm.com> +>>>> + * Author: Sudeep Holla <sudeep.holla-5wv7dgnIgG8@public.gmane.org> >>>> + * ->>>> + * This program is free software; you can redistribute it and/or modi= -fy +>>>> + * This program is free software; you can redistribute it and/or modify >>>> + * it under the terms of the GNU General Public License version 2 as >>>> + * published by the Free Software Foundation. >>>> + * >>>> + * This program is distributed "as is" WITHOUT ANY WARRANTY of any ->>>> + * kind, whether express or implied; without even the implied warrant= -y +>>>> + * kind, whether express or implied; without even the implied warranty >>>> + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >>>> + * GNU General Public License for more details. >>>> + */ @@ -75,21 +70,19 @@ y >>>> +#include <linux/sysfs.h> >>>> + >>>> +struct cache_attr { ->>>> +=09struct attribute attr; ->>>> +=09 ssize_t(*show) (unsigned int, unsigned short, char *); ->>>> +=09 ssize_t(*store) (unsigned int, unsigned short, const char *, size= -_t); +>>>> + struct attribute attr; +>>>> + ssize_t(*show) (unsigned int, unsigned short, char *); +>>>> + ssize_t(*store) (unsigned int, unsigned short, const char *, size_t); >>>> +}; >>>> + >>>> +/* pointer to kobject for cpuX/cache */ >>>> +static DEFINE_PER_CPU(struct kobject *, ci_cache_kobject); ->>>> +#define per_cpu_cache_kobject(cpu) (per_cpu(ci_cache_kobject, cpu= -)) +>>>> +#define per_cpu_cache_kobject(cpu) (per_cpu(ci_cache_kobject, cpu)) >>>> + >>>> +struct index_kobject { ->>>> +=09struct kobject kobj; ->>>> +=09unsigned int cpu; ->>>> +=09unsigned short index; +>>>> + struct kobject kobj; +>>>> + unsigned int cpu; +>>>> + unsigned short index; >>>> +}; >>>> + >>>> +static cpumask_t cache_dev_map; @@ -101,31 +94,34 @@ _t); >>> get a lot simpler when you do that. >>> >> ->> Yes I now understand device attribute group simplifies the code, but I t= -hink +>> Yes I now understand device attribute group simplifies the code, but I think >> kobjects are still needed as we need to track both cpu and cache index. >> By reusing only cpu device kobject, we can track cpu only. ->=20 +> > I don't understand, you are putting things under the cpu device object, > why do you care about a "cache" kobject? ->=20 +> Yes though the cache attributes are under cpu objects, it's hierarchical something like: /sys/devices/system/cpu/cpu<n>/cache/index<m>/<attribute_x> <attribute_x> is unique for each pair of (cpu<n>, index<m> -index is more like cache level, but with 2 indices if they are separate(I$,= -D$) +index is more like cache level, but with 2 indices if they are separate(I$,D$) ->> One thought I have is to make cache_info structure common to all archite= -cture +>> One thought I have is to make cache_info structure common to all architecture >> (for now its ARM specific) and introduce kobject in that similar to ia64 >> implementation. That even eliminates lot of weak functions defined. ->=20 +> > Please don't use raw kobjects if at all possible, it's not good for a > variety of reasons (no userspace events, have to roll your own code, > etc.) ->=20 +> Yes I understand, will try to explore other feasible solutions. Regards, Sudeep + + +-- +To unsubscribe from this list: send the line "unsubscribe devicetree" in +the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org +More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N2/content_digest index 50ee8c2..d3a2030 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -3,40 +3,39 @@ "ref\020140108202707.GE8417@kroah.com\0" "ref\052CEF624.9020702@arm.com\0" "ref\020140109193121.GA14991@kroah.com\0" - "From\0Sudeep Holla <Sudeep.Holla@arm.com>\0" + "ref\020140109193121.GA14991-U8xfFu+wG4EAvxtiuMwx3w@public.gmane.org\0" + "From\0Sudeep Holla <Sudeep.Holla-5wv7dgnIgG8@public.gmane.org>\0" "Subject\0Re: [PATCH RFC 1/3] drivers: base: support cpu cache information interface to userspace via sysfs\0" "Date\0Thu, 09 Jan 2014 19:47:47 +0000\0" - "To\0Greg Kroah-Hartman <gregkh@linuxfoundation.org>\0" - "Cc\0devicetree@vger.kernel.org <devicetree@vger.kernel.org>" - Ashok Raj <ashok.raj@intel.com> - Rob Herring <robh@kernel.org> - x86@kernel.org <x86@kernel.org> - linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org> - Sudeep.Holla@arm.com - linuxppc-dev@lists.ozlabs.org <linuxppc-dev@lists.ozlabs.org> - " linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org>\0" + "To\0Greg Kroah-Hartman <gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org>\0" + "Cc\0Sudeep.Holla-5wv7dgnIgG8@public.gmane.org" + x86-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org <x86-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> + linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org <linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org> + devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> + linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> + linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org> + Ashok Raj <ashok.raj-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> + Benjamin Herrenschmidt <benh-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org> + " Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>\0" "\00:1\0" "b\0" "On 09/01/14 19:31, Greg Kroah-Hartman wrote:\n" "> On Thu, Jan 09, 2014 at 07:19:00PM +0000, Sudeep Holla wrote:\n" ">> On 08/01/14 20:27, Greg Kroah-Hartman wrote:\n" ">>> On Wed, Jan 08, 2014 at 07:26:06PM +0000, Sudeep Holla wrote:\n" - ">>>> From: Sudeep Holla <sudeep.holla@arm.com>\n" + ">>>> From: Sudeep Holla <sudeep.holla-5wv7dgnIgG8@public.gmane.org>\n" ">>>>\n" - ">>>> This patch adds initial support for providing processor cache informat=\n" - "ion\n" - ">>>> to userspace through sysfs interface. This is based on x86 implementat=\n" - "ion\n" + ">>>> This patch adds initial support for providing processor cache information\n" + ">>>> to userspace through sysfs interface. This is based on x86 implementation\n" ">>>> and hence the interface is intended to be fully compatible.\n" ">>>>\n" ">>>> A per-cpu array of cache information maintained is used mainly for\n" ">>>> sysfs-related book keeping.\n" ">>>>\n" - ">>>> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>\n" + ">>>> Signed-off-by: Sudeep Holla <sudeep.holla-5wv7dgnIgG8@public.gmane.org>\n" ">>>> ---\n" ">>>> drivers/base/Makefile | 2 +-\n" - ">>>> drivers/base/cacheinfo.c | 296 +++++++++++++++++++++++++++++++++++++=\n" - "+++++++++\n" + ">>>> drivers/base/cacheinfo.c | 296 ++++++++++++++++++++++++++++++++++++++++++++++\n" ">>>> include/linux/cacheinfo.h | 43 +++++++\n" ">>>> 3 files changed, 340 insertions(+), 1 deletion(-)\n" ">>>> create mode 100644 drivers/base/cacheinfo.c\n" @@ -46,15 +45,15 @@ ">>>> index 94e8a80..76f07c8 100644\n" ">>>> --- a/drivers/base/Makefile\n" ">>>> +++ b/drivers/base/Makefile\n" - ">>>> @@ -4,7 +4,7 @@ obj-y=09=09=09:=3D core.o bus.o dd.o syscore.o \\\n" - ">>>> =09=09=09 driver.o class.o platform.o \\\n" - ">>>> =09=09=09 cpu.o firmware.o init.o map.o devres.o \\\n" - ">>>> =09=09=09 attribute_container.o transport_class.o \\\n" - ">>>> -=09=09=09 topology.o\n" - ">>>> +=09=09=09 topology.o cacheinfo.o\n" - ">>>> obj-$(CONFIG_DEVTMPFS)=09+=3D devtmpfs.o\n" - ">>>> obj-$(CONFIG_DMA_CMA) +=3D dma-contiguous.o\n" - ">>>> obj-y=09=09=09+=3D power/\n" + ">>>> @@ -4,7 +4,7 @@ obj-y\t\t\t:= core.o bus.o dd.o syscore.o \\\n" + ">>>> \t\t\t driver.o class.o platform.o \\\n" + ">>>> \t\t\t cpu.o firmware.o init.o map.o devres.o \\\n" + ">>>> \t\t\t attribute_container.o transport_class.o \\\n" + ">>>> -\t\t\t topology.o\n" + ">>>> +\t\t\t topology.o cacheinfo.o\n" + ">>>> obj-$(CONFIG_DEVTMPFS)\t+= devtmpfs.o\n" + ">>>> obj-$(CONFIG_DMA_CMA) += dma-contiguous.o\n" + ">>>> obj-y\t\t\t+= power/\n" ">>>> diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c\n" ">>>> new file mode 100644\n" ">>>> index 0000000..f436c31\n" @@ -67,16 +66,14 @@ ">>>> + * Copyright (C) 2013 ARM Ltd.\n" ">>>> + * All Rights Reserved\n" ">>>> + *\n" - ">>>> + * Author: Sudeep Holla <sudeep.holla@arm.com>\n" + ">>>> + * Author: Sudeep Holla <sudeep.holla-5wv7dgnIgG8@public.gmane.org>\n" ">>>> + *\n" - ">>>> + * This program is free software; you can redistribute it and/or modi=\n" - "fy\n" + ">>>> + * This program is free software; you can redistribute it and/or modify\n" ">>>> + * it under the terms of the GNU General Public License version 2 as\n" ">>>> + * published by the Free Software Foundation.\n" ">>>> + *\n" ">>>> + * This program is distributed \"as is\" WITHOUT ANY WARRANTY of any\n" - ">>>> + * kind, whether express or implied; without even the implied warrant=\n" - "y\n" + ">>>> + * kind, whether express or implied; without even the implied warranty\n" ">>>> + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n" ">>>> + * GNU General Public License for more details.\n" ">>>> + */\n" @@ -94,21 +91,19 @@ ">>>> +#include <linux/sysfs.h>\n" ">>>> +\n" ">>>> +struct cache_attr {\n" - ">>>> +=09struct attribute attr;\n" - ">>>> +=09 ssize_t(*show) (unsigned int, unsigned short, char *);\n" - ">>>> +=09 ssize_t(*store) (unsigned int, unsigned short, const char *, size=\n" - "_t);\n" + ">>>> +\tstruct attribute attr;\n" + ">>>> +\t ssize_t(*show) (unsigned int, unsigned short, char *);\n" + ">>>> +\t ssize_t(*store) (unsigned int, unsigned short, const char *, size_t);\n" ">>>> +};\n" ">>>> +\n" ">>>> +/* pointer to kobject for cpuX/cache */\n" ">>>> +static DEFINE_PER_CPU(struct kobject *, ci_cache_kobject);\n" - ">>>> +#define per_cpu_cache_kobject(cpu) (per_cpu(ci_cache_kobject, cpu=\n" - "))\n" + ">>>> +#define per_cpu_cache_kobject(cpu) (per_cpu(ci_cache_kobject, cpu))\n" ">>>> +\n" ">>>> +struct index_kobject {\n" - ">>>> +=09struct kobject kobj;\n" - ">>>> +=09unsigned int cpu;\n" - ">>>> +=09unsigned short index;\n" + ">>>> +\tstruct kobject kobj;\n" + ">>>> +\tunsigned int cpu;\n" + ">>>> +\tunsigned short index;\n" ">>>> +};\n" ">>>> +\n" ">>>> +static cpumask_t cache_dev_map;\n" @@ -120,33 +115,36 @@ ">>> get a lot simpler when you do that.\n" ">>>\n" ">>\n" - ">> Yes I now understand device attribute group simplifies the code, but I t=\n" - "hink\n" + ">> Yes I now understand device attribute group simplifies the code, but I think\n" ">> kobjects are still needed as we need to track both cpu and cache index.\n" ">> By reusing only cpu device kobject, we can track cpu only.\n" - ">=20\n" + "> \n" "> I don't understand, you are putting things under the cpu device object,\n" "> why do you care about a \"cache\" kobject?\n" - ">=20\n" + "> \n" "Yes though the cache attributes are under cpu objects, it's hierarchical\n" "something like:\n" "/sys/devices/system/cpu/cpu<n>/cache/index<m>/<attribute_x>\n" "<attribute_x> is unique for each pair of (cpu<n>, index<m>\n" - "index is more like cache level, but with 2 indices if they are separate(I$,=\n" - "D$)\n" + "index is more like cache level, but with 2 indices if they are separate(I$,D$)\n" "\n" - ">> One thought I have is to make cache_info structure common to all archite=\n" - "cture\n" + ">> One thought I have is to make cache_info structure common to all architecture\n" ">> (for now its ARM specific) and introduce kobject in that similar to ia64\n" ">> implementation. That even eliminates lot of weak functions defined.\n" - ">=20\n" + "> \n" "> Please don't use raw kobjects if at all possible, it's not good for a\n" "> variety of reasons (no userspace events, have to roll your own code,\n" "> etc.)\n" - ">=20\n" + "> \n" "Yes I understand, will try to explore other feasible solutions.\n" "\n" "Regards,\n" - Sudeep + "Sudeep\n" + "\n" + "\n" + "--\n" + "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n" + "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" + More majordomo info at http://vger.kernel.org/majordomo-info.html -75e8691a85e9b3e26b1151607dadd6e00c8ba0a0f7ae20236844537b4c01743c +fe64aeefe38aeaec29f90948f82febfa2907f3384d7228a57d119960d1778e0d
diff --git a/a/1.txt b/N3/1.txt index eb52f78..8b37a6e 100644 --- a/a/1.txt +++ b/N3/1.txt @@ -4,10 +4,8 @@ On 09/01/14 19:31, Greg Kroah-Hartman wrote: >>> On Wed, Jan 08, 2014 at 07:26:06PM +0000, Sudeep Holla wrote: >>>> From: Sudeep Holla <sudeep.holla@arm.com> >>>> ->>>> This patch adds initial support for providing processor cache informat= -ion ->>>> to userspace through sysfs interface. This is based on x86 implementat= -ion +>>>> This patch adds initial support for providing processor cache information +>>>> to userspace through sysfs interface. This is based on x86 implementation >>>> and hence the interface is intended to be fully compatible. >>>> >>>> A per-cpu array of cache information maintained is used mainly for @@ -16,8 +14,7 @@ ion >>>> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> >>>> --- >>>> drivers/base/Makefile | 2 +- ->>>> drivers/base/cacheinfo.c | 296 +++++++++++++++++++++++++++++++++++++= -+++++++++ +>>>> drivers/base/cacheinfo.c | 296 ++++++++++++++++++++++++++++++++++++++++++++++ >>>> include/linux/cacheinfo.h | 43 +++++++ >>>> 3 files changed, 340 insertions(+), 1 deletion(-) >>>> create mode 100644 drivers/base/cacheinfo.c @@ -27,15 +24,15 @@ ion >>>> index 94e8a80..76f07c8 100644 >>>> --- a/drivers/base/Makefile >>>> +++ b/drivers/base/Makefile ->>>> @@ -4,7 +4,7 @@ obj-y=09=09=09:=3D core.o bus.o dd.o syscore.o \ ->>>> =09=09=09 driver.o class.o platform.o \ ->>>> =09=09=09 cpu.o firmware.o init.o map.o devres.o \ ->>>> =09=09=09 attribute_container.o transport_class.o \ ->>>> -=09=09=09 topology.o ->>>> +=09=09=09 topology.o cacheinfo.o ->>>> obj-$(CONFIG_DEVTMPFS)=09+=3D devtmpfs.o ->>>> obj-$(CONFIG_DMA_CMA) +=3D dma-contiguous.o ->>>> obj-y=09=09=09+=3D power/ +>>>> @@ -4,7 +4,7 @@ obj-y := core.o bus.o dd.o syscore.o \ +>>>> driver.o class.o platform.o \ +>>>> cpu.o firmware.o init.o map.o devres.o \ +>>>> attribute_container.o transport_class.o \ +>>>> - topology.o +>>>> + topology.o cacheinfo.o +>>>> obj-$(CONFIG_DEVTMPFS) += devtmpfs.o +>>>> obj-$(CONFIG_DMA_CMA) += dma-contiguous.o +>>>> obj-y += power/ >>>> diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c >>>> new file mode 100644 >>>> index 0000000..f436c31 @@ -50,14 +47,12 @@ ion >>>> + * >>>> + * Author: Sudeep Holla <sudeep.holla@arm.com> >>>> + * ->>>> + * This program is free software; you can redistribute it and/or modi= -fy +>>>> + * This program is free software; you can redistribute it and/or modify >>>> + * it under the terms of the GNU General Public License version 2 as >>>> + * published by the Free Software Foundation. >>>> + * >>>> + * This program is distributed "as is" WITHOUT ANY WARRANTY of any ->>>> + * kind, whether express or implied; without even the implied warrant= -y +>>>> + * kind, whether express or implied; without even the implied warranty >>>> + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >>>> + * GNU General Public License for more details. >>>> + */ @@ -75,21 +70,19 @@ y >>>> +#include <linux/sysfs.h> >>>> + >>>> +struct cache_attr { ->>>> +=09struct attribute attr; ->>>> +=09 ssize_t(*show) (unsigned int, unsigned short, char *); ->>>> +=09 ssize_t(*store) (unsigned int, unsigned short, const char *, size= -_t); +>>>> + struct attribute attr; +>>>> + ssize_t(*show) (unsigned int, unsigned short, char *); +>>>> + ssize_t(*store) (unsigned int, unsigned short, const char *, size_t); >>>> +}; >>>> + >>>> +/* pointer to kobject for cpuX/cache */ >>>> +static DEFINE_PER_CPU(struct kobject *, ci_cache_kobject); ->>>> +#define per_cpu_cache_kobject(cpu) (per_cpu(ci_cache_kobject, cpu= -)) +>>>> +#define per_cpu_cache_kobject(cpu) (per_cpu(ci_cache_kobject, cpu)) >>>> + >>>> +struct index_kobject { ->>>> +=09struct kobject kobj; ->>>> +=09unsigned int cpu; ->>>> +=09unsigned short index; +>>>> + struct kobject kobj; +>>>> + unsigned int cpu; +>>>> + unsigned short index; >>>> +}; >>>> + >>>> +static cpumask_t cache_dev_map; @@ -101,30 +94,27 @@ _t); >>> get a lot simpler when you do that. >>> >> ->> Yes I now understand device attribute group simplifies the code, but I t= -hink +>> Yes I now understand device attribute group simplifies the code, but I think >> kobjects are still needed as we need to track both cpu and cache index. >> By reusing only cpu device kobject, we can track cpu only. ->=20 +> > I don't understand, you are putting things under the cpu device object, > why do you care about a "cache" kobject? ->=20 +> Yes though the cache attributes are under cpu objects, it's hierarchical something like: /sys/devices/system/cpu/cpu<n>/cache/index<m>/<attribute_x> <attribute_x> is unique for each pair of (cpu<n>, index<m> -index is more like cache level, but with 2 indices if they are separate(I$,= -D$) +index is more like cache level, but with 2 indices if they are separate(I$,D$) ->> One thought I have is to make cache_info structure common to all archite= -cture +>> One thought I have is to make cache_info structure common to all architecture >> (for now its ARM specific) and introduce kobject in that similar to ia64 >> implementation. That even eliminates lot of weak functions defined. ->=20 +> > Please don't use raw kobjects if at all possible, it's not good for a > variety of reasons (no userspace events, have to roll your own code, > etc.) ->=20 +> Yes I understand, will try to explore other feasible solutions. Regards, diff --git a/a/content_digest b/N3/content_digest index 50ee8c2..e6a6a80 100644 --- a/a/content_digest +++ b/N3/content_digest @@ -7,14 +7,15 @@ "Subject\0Re: [PATCH RFC 1/3] drivers: base: support cpu cache information interface to userspace via sysfs\0" "Date\0Thu, 09 Jan 2014 19:47:47 +0000\0" "To\0Greg Kroah-Hartman <gregkh@linuxfoundation.org>\0" - "Cc\0devicetree@vger.kernel.org <devicetree@vger.kernel.org>" - Ashok Raj <ashok.raj@intel.com> - Rob Herring <robh@kernel.org> + "Cc\0Sudeep.Holla@arm.com" x86@kernel.org <x86@kernel.org> - linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org> - Sudeep.Holla@arm.com linuxppc-dev@lists.ozlabs.org <linuxppc-dev@lists.ozlabs.org> - " linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org>\0" + devicetree@vger.kernel.org <devicetree@vger.kernel.org> + linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org> + linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org> + Ashok Raj <ashok.raj@intel.com> + Benjamin Herrenschmidt <benh@kernel.crashing.org> + " Rob Herring <robh@kernel.org>\0" "\00:1\0" "b\0" "On 09/01/14 19:31, Greg Kroah-Hartman wrote:\n" @@ -23,10 +24,8 @@ ">>> On Wed, Jan 08, 2014 at 07:26:06PM +0000, Sudeep Holla wrote:\n" ">>>> From: Sudeep Holla <sudeep.holla@arm.com>\n" ">>>>\n" - ">>>> This patch adds initial support for providing processor cache informat=\n" - "ion\n" - ">>>> to userspace through sysfs interface. This is based on x86 implementat=\n" - "ion\n" + ">>>> This patch adds initial support for providing processor cache information\n" + ">>>> to userspace through sysfs interface. This is based on x86 implementation\n" ">>>> and hence the interface is intended to be fully compatible.\n" ">>>>\n" ">>>> A per-cpu array of cache information maintained is used mainly for\n" @@ -35,8 +34,7 @@ ">>>> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>\n" ">>>> ---\n" ">>>> drivers/base/Makefile | 2 +-\n" - ">>>> drivers/base/cacheinfo.c | 296 +++++++++++++++++++++++++++++++++++++=\n" - "+++++++++\n" + ">>>> drivers/base/cacheinfo.c | 296 ++++++++++++++++++++++++++++++++++++++++++++++\n" ">>>> include/linux/cacheinfo.h | 43 +++++++\n" ">>>> 3 files changed, 340 insertions(+), 1 deletion(-)\n" ">>>> create mode 100644 drivers/base/cacheinfo.c\n" @@ -46,15 +44,15 @@ ">>>> index 94e8a80..76f07c8 100644\n" ">>>> --- a/drivers/base/Makefile\n" ">>>> +++ b/drivers/base/Makefile\n" - ">>>> @@ -4,7 +4,7 @@ obj-y=09=09=09:=3D core.o bus.o dd.o syscore.o \\\n" - ">>>> =09=09=09 driver.o class.o platform.o \\\n" - ">>>> =09=09=09 cpu.o firmware.o init.o map.o devres.o \\\n" - ">>>> =09=09=09 attribute_container.o transport_class.o \\\n" - ">>>> -=09=09=09 topology.o\n" - ">>>> +=09=09=09 topology.o cacheinfo.o\n" - ">>>> obj-$(CONFIG_DEVTMPFS)=09+=3D devtmpfs.o\n" - ">>>> obj-$(CONFIG_DMA_CMA) +=3D dma-contiguous.o\n" - ">>>> obj-y=09=09=09+=3D power/\n" + ">>>> @@ -4,7 +4,7 @@ obj-y\t\t\t:= core.o bus.o dd.o syscore.o \\\n" + ">>>> \t\t\t driver.o class.o platform.o \\\n" + ">>>> \t\t\t cpu.o firmware.o init.o map.o devres.o \\\n" + ">>>> \t\t\t attribute_container.o transport_class.o \\\n" + ">>>> -\t\t\t topology.o\n" + ">>>> +\t\t\t topology.o cacheinfo.o\n" + ">>>> obj-$(CONFIG_DEVTMPFS)\t+= devtmpfs.o\n" + ">>>> obj-$(CONFIG_DMA_CMA) += dma-contiguous.o\n" + ">>>> obj-y\t\t\t+= power/\n" ">>>> diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c\n" ">>>> new file mode 100644\n" ">>>> index 0000000..f436c31\n" @@ -69,14 +67,12 @@ ">>>> + *\n" ">>>> + * Author: Sudeep Holla <sudeep.holla@arm.com>\n" ">>>> + *\n" - ">>>> + * This program is free software; you can redistribute it and/or modi=\n" - "fy\n" + ">>>> + * This program is free software; you can redistribute it and/or modify\n" ">>>> + * it under the terms of the GNU General Public License version 2 as\n" ">>>> + * published by the Free Software Foundation.\n" ">>>> + *\n" ">>>> + * This program is distributed \"as is\" WITHOUT ANY WARRANTY of any\n" - ">>>> + * kind, whether express or implied; without even the implied warrant=\n" - "y\n" + ">>>> + * kind, whether express or implied; without even the implied warranty\n" ">>>> + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n" ">>>> + * GNU General Public License for more details.\n" ">>>> + */\n" @@ -94,21 +90,19 @@ ">>>> +#include <linux/sysfs.h>\n" ">>>> +\n" ">>>> +struct cache_attr {\n" - ">>>> +=09struct attribute attr;\n" - ">>>> +=09 ssize_t(*show) (unsigned int, unsigned short, char *);\n" - ">>>> +=09 ssize_t(*store) (unsigned int, unsigned short, const char *, size=\n" - "_t);\n" + ">>>> +\tstruct attribute attr;\n" + ">>>> +\t ssize_t(*show) (unsigned int, unsigned short, char *);\n" + ">>>> +\t ssize_t(*store) (unsigned int, unsigned short, const char *, size_t);\n" ">>>> +};\n" ">>>> +\n" ">>>> +/* pointer to kobject for cpuX/cache */\n" ">>>> +static DEFINE_PER_CPU(struct kobject *, ci_cache_kobject);\n" - ">>>> +#define per_cpu_cache_kobject(cpu) (per_cpu(ci_cache_kobject, cpu=\n" - "))\n" + ">>>> +#define per_cpu_cache_kobject(cpu) (per_cpu(ci_cache_kobject, cpu))\n" ">>>> +\n" ">>>> +struct index_kobject {\n" - ">>>> +=09struct kobject kobj;\n" - ">>>> +=09unsigned int cpu;\n" - ">>>> +=09unsigned short index;\n" + ">>>> +\tstruct kobject kobj;\n" + ">>>> +\tunsigned int cpu;\n" + ">>>> +\tunsigned short index;\n" ">>>> +};\n" ">>>> +\n" ">>>> +static cpumask_t cache_dev_map;\n" @@ -120,33 +114,30 @@ ">>> get a lot simpler when you do that.\n" ">>>\n" ">>\n" - ">> Yes I now understand device attribute group simplifies the code, but I t=\n" - "hink\n" + ">> Yes I now understand device attribute group simplifies the code, but I think\n" ">> kobjects are still needed as we need to track both cpu and cache index.\n" ">> By reusing only cpu device kobject, we can track cpu only.\n" - ">=20\n" + "> \n" "> I don't understand, you are putting things under the cpu device object,\n" "> why do you care about a \"cache\" kobject?\n" - ">=20\n" + "> \n" "Yes though the cache attributes are under cpu objects, it's hierarchical\n" "something like:\n" "/sys/devices/system/cpu/cpu<n>/cache/index<m>/<attribute_x>\n" "<attribute_x> is unique for each pair of (cpu<n>, index<m>\n" - "index is more like cache level, but with 2 indices if they are separate(I$,=\n" - "D$)\n" + "index is more like cache level, but with 2 indices if they are separate(I$,D$)\n" "\n" - ">> One thought I have is to make cache_info structure common to all archite=\n" - "cture\n" + ">> One thought I have is to make cache_info structure common to all architecture\n" ">> (for now its ARM specific) and introduce kobject in that similar to ia64\n" ">> implementation. That even eliminates lot of weak functions defined.\n" - ">=20\n" + "> \n" "> Please don't use raw kobjects if at all possible, it's not good for a\n" "> variety of reasons (no userspace events, have to roll your own code,\n" "> etc.)\n" - ">=20\n" + "> \n" "Yes I understand, will try to explore other feasible solutions.\n" "\n" "Regards,\n" Sudeep -75e8691a85e9b3e26b1151607dadd6e00c8ba0a0f7ae20236844537b4c01743c +5c5572d947ad79cb536e87e20a319df4c2a3fb6e094f82b1f106e682801f8f34
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