From: Steven Pratt <slpratt@austin.ibm.com>
To: linuxppc-dev@lists.ozlabs.org
Subject: Disable sleep states on P7+
Date: Tue, 14 Jan 2014 08:36:16 -0600 [thread overview]
Message-ID: <52D54B60.4090807@austin.ibm.com> (raw)
I am looking for info on when and how we are able to disable power saving features of current (P7, P7+) chips in order to reduce latency. This is often done in latency sensitive applications when power consumption is not an issue. On Intel boxes we can disable P-state frequency changes as well as disabling C-State or sleep state changes. In fact we can control how deep a sleep the processor can go into. I know we have control Dynamic Processor Scaling and Idle Power Savings, but what states do these really affect? Can I really disable Nap mode of a processor? If so how? Can I disable even the lightest winkle mode? Looking for current information (read RHEL 6 and SLES11), future changes are interesting.
Steve
next reply other threads:[~2014-01-14 14:36 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-01-14 14:36 Steven Pratt [this message]
2014-01-14 16:10 ` Disable sleep states on P7+ Preeti U Murthy
2014-01-14 17:04 ` Steven Pratt
2014-01-15 11:02 ` Deepthi Dharwar
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