From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45838) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W3qId-0007xP-87 for qemu-devel@nongnu.org; Thu, 16 Jan 2014 12:00:20 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1W3qIU-0002Qp-0P for qemu-devel@nongnu.org; Thu, 16 Jan 2014 12:00:11 -0500 Received: from e7.ny.us.ibm.com ([32.97.182.137]:36256) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W3qIT-0002Ps-Tp for qemu-devel@nongnu.org; Thu, 16 Jan 2014 12:00:01 -0500 Received: from /spool/local by e7.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Thu, 16 Jan 2014 11:59:59 -0500 Message-ID: <52D80FFF.8070407@linux.vnet.ibm.com> Date: Thu, 16 Jan 2014 10:59:43 -0600 From: Thomas Falcon MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] [PATCH v2] target-ppc: gdbstub allow byte swapping for reading/writing registers List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, agraf@suse.de This patch allows registers to be properly read from and written to when using the gdbstub to debug a ppc guest running in little endian mode. It accomplishes this goal by byte swapping the values of any registers if the MSR:LE value is set. Signed-off-by: Thomas Falcon --- Have created wrapper functions that swap mem_buf in-place. mem_buf is swapped regardless of the the host's endianness if msr_le is true. --- target-ppc/cpu-qom.h | 2 ++ target-ppc/gdbstub.c | 48 +++++++++++++++++++++++++++++++++++++++++++++ target-ppc/translate_init.c | 4 ++-- 3 files changed, 52 insertions(+), 2 deletions(-) diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h index 72b2232..992963f 100644 --- a/target-ppc/cpu-qom.h +++ b/target-ppc/cpu-qom.h @@ -109,7 +109,9 @@ void ppc_cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, int flags); hwaddr ppc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); int ppc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); +int ppc_cpu_gdb_read_register_wrap(CPUState *cpu, uint8_t *buf, int reg); int ppc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); +int ppc_cpu_gdb_write_register_wrap(CPUState *cpu, uint8_t *buf, int reg); int ppc64_cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu, void *opaque); int ppc64_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs, diff --git a/target-ppc/gdbstub.c b/target-ppc/gdbstub.c index 1c91090..964fd85 100644 --- a/target-ppc/gdbstub.c +++ b/target-ppc/gdbstub.c @@ -21,6 +21,54 @@ #include "qemu-common.h" #include "exec/gdbstub.h" +/* The following functions are used to ensure the correct + * transfer of registers between a little endian ppc target + * and a big endian host by checking the LE bit in the Machine State Register + */ + +int ppc_cpu_gdb_read_register_wrap(CPUState *cs, uint8_t *mem_buf, int n) +{ + PowerPCCPU *cpu = POWERPC_CPU(cs); + CPUPPCState *env = &cpu->env; + + int len = ppc_cpu_gdb_read_register(cs, mem_buf, n),i; + if(msr_le) + { + uint8_t tmp; + for(i=0;ienv; + if(msr_le) + { + int len=0,i=0; + if(n < 64) + len=8; + else if(n == 66) + len=4; + else + len = sizeof(target_ulong); + uint8_t tmp; + for(i=0;idump_state = ppc_cpu_dump_state; cc->dump_statistics = ppc_cpu_dump_statistics; cc->set_pc = ppc_cpu_set_pc; - cc->gdb_read_register = ppc_cpu_gdb_read_register; - cc->gdb_write_register = ppc_cpu_gdb_write_register; + cc->gdb_read_register = ppc_cpu_gdb_read_register_wrap; + cc->gdb_write_register = ppc_cpu_gdb_write_register_wrap; #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug = ppc_cpu_get_phys_page_debug; cc->vmsd = &vmstate_ppc_cpu; -- 1.8.3.1