Re: [PATCH 1/3] Nested VMX: update nested paging mode when vmswitch is in progress

["Egger, Christoph" <chegger@amazon.de>]

On 21.01.14 09:49, Zhang, Yang Z wrote:
> Egger, Christoph wrote on 2014-01-20:
>> On 14.01.14 08:38, Zhang, Yang Z wrote:
>>> Jan Beulich wrote on 2014-01-14:
>>>>>>> On 14.01.14 at 03:33, "Zhang, Yang Z" <yang.z.zhang@intel.com>
>> wrote:
>>>>> Zhang, Yang Z wrote on 2013-12-24:
>>>>>
>>>>> Any comments ?
>>>>
>>>> Considering Christoph's comments and reservations, if you can't
>>>> alone deal with this I think you should work with the AMD people to
>>>> eliminate or address his concerns.
>>>>
>>>
>>> Yes. But the problem puzzled me is that Christoph said nested SVM works
>>> well w/o my patch which I cannot understand. Because according my
>>> analysis in previous thread, it also buggy in AMD side. But if they
>>> really solved the issue in their side, I wonder how they fix it.
>>> Perhaps I can use the same solution in VMX side without touch the
>>> common code.
>>>
>>> Christoph, can you help to check it? thanks.
>>
>> The fix I mentioned solves the vmswitch problem on AMD side.
> 
> But the current code is buggy with your fixing even in AMD side, see below scenario:
> virtual vmentry: 
>     Expected result: nested mode is being updated.
>     Current result in SVM: 
>           !vcpu_in_guestmode and vmswitch_in_progress:  L1's paging mode is updated.  Wrong.
> 
> I cannot understand why you said it is working.

This page mode problem you discovered that needs to be addressed for
both SVM and VMX.

The fix I am saying is working solves the problem of emulating an MMIO
instruction which is finished in the softirq while an interrupt
can cause a vmswitch during instruction emulation.

We are talking about two different issues. One is fixed on AMD side and
one not.

Christoph