From: Richard Henderson <rth@twiddle.net>
To: Peter Maydell <peter.maydell@linaro.org>, qemu-devel@nongnu.org
Cc: patches@linaro.org, "Michael Matz" <matz@suse.de>,
"Alexander Graf" <agraf@suse.de>,
"Claudio Fontana" <claudio.fontana@linaro.org>,
"Dirk Mueller" <dmueller@suse.de>,
"Will Newton" <will.newton@linaro.org>,
"Laurent Desnogues" <laurent.desnogues@gmail.com>,
"Alex Bennée" <alex.bennee@linaro.org>,
kvmarm@lists.cs.columbia.edu,
"Christoffer Dall" <christoffer.dall@linaro.org>
Subject: Re: [Qemu-devel] [PATCH 0/8] target-arm: A64 Neon instructions, set 2
Date: Tue, 21 Jan 2014 13:42:31 -0800 [thread overview]
Message-ID: <52DEE9C7.2040202@twiddle.net> (raw)
In-Reply-To: <1389984257-6822-1-git-send-email-peter.maydell@linaro.org>
On 01/17/2014 10:44 AM, Peter Maydell wrote:
> Alex Bennée (2):
> target-arm: A64: Add logic ops from SIMD 3 same group
> target-arm: A64: Add SIMD shift by immediate
>
> Peter Maydell (6):
> target-arm: A64: Add SIMD three-different multiply accumulate insns
> target-arm: A64: Add SIMD three-different ABDL instructions
> target-arm: A64: Add SIMD scalar 3 same add, sub and compare ops
> target-arm: A64: Add top level decode for SIMD 3-same group
> target-arm: A64: Add integer ops from SIMD 3-same group
> target-arm: A64: Add simple SIMD 3-same floating point ops
I've responded with individual tweaks to some of the patches,
but I saw nothing actually incorrect in any in any of them, so,
Reviewed-by: Richard Henderson <rth@twiddle.net>
r~
prev parent reply other threads:[~2014-01-21 21:42 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-01-17 18:44 [Qemu-devel] [PATCH 0/8] target-arm: A64 Neon instructions, set 2 Peter Maydell
2014-01-17 18:44 ` [Qemu-devel] [PATCH 1/8] target-arm: A64: Add SIMD three-different multiply accumulate insns Peter Maydell
2014-01-17 18:44 ` [Qemu-devel] [PATCH 2/8] target-arm: A64: Add SIMD three-different ABDL instructions Peter Maydell
2014-01-17 18:44 ` [Qemu-devel] [PATCH 3/8] target-arm: A64: Add SIMD scalar 3 same add, sub and compare ops Peter Maydell
2014-01-21 19:26 ` Richard Henderson
2014-01-17 18:44 ` [Qemu-devel] [PATCH 4/8] target-arm: A64: Add top level decode for SIMD 3-same group Peter Maydell
2014-01-17 18:44 ` [Qemu-devel] [PATCH 5/8] target-arm: A64: Add logic ops from SIMD 3 same group Peter Maydell
2014-01-21 19:35 ` Richard Henderson
2014-01-17 18:44 ` [Qemu-devel] [PATCH 6/8] target-arm: A64: Add integer ops from SIMD 3-same group Peter Maydell
2014-01-21 19:37 ` Richard Henderson
2014-01-21 19:53 ` Peter Maydell
2014-01-22 4:59 ` Xbing Wang
2014-01-22 6:13 ` Richard Henderson
2014-01-22 6:48 ` Xbing Wang
2014-01-21 19:40 ` Richard Henderson
2014-01-17 18:44 ` [Qemu-devel] [PATCH 7/8] target-arm: A64: Add simple SIMD 3-same floating point ops Peter Maydell
2014-01-17 18:44 ` [Qemu-devel] [PATCH 8/8] target-arm: A64: Add SIMD shift by immediate Peter Maydell
2014-01-21 21:43 ` Richard Henderson
2014-01-21 21:42 ` Richard Henderson [this message]
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