From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from e23smtp05.au.ibm.com (e23smtp05.au.ibm.com [202.81.31.147]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 5F2E42C00A7 for ; Wed, 22 Jan 2014 20:38:43 +1100 (EST) Received: from /spool/local by e23smtp05.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Wed, 22 Jan 2014 19:38:42 +1000 Received: from d23relay05.au.ibm.com (d23relay05.au.ibm.com [9.190.235.152]) by d23dlp01.au.ibm.com (Postfix) with ESMTP id 0D9F52CE8056 for ; Wed, 22 Jan 2014 20:38:39 +1100 (EST) Received: from d23av01.au.ibm.com (d23av01.au.ibm.com [9.190.234.96]) by d23relay05.au.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id s0M9JQgF56492270 for ; Wed, 22 Jan 2014 20:19:27 +1100 Received: from d23av01.au.ibm.com (localhost [127.0.0.1]) by d23av01.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id s0M9cbnX015567 for ; Wed, 22 Jan 2014 20:38:37 +1100 Message-ID: <52DF914B.2060308@linux.vnet.ibm.com> Date: Wed, 22 Jan 2014 15:07:15 +0530 From: Anshuman Khandual MIME-Version: 1.0 To: Michael Ellerman Subject: Re: [PATCH 0/8] Add support for PowerPC Hypervisor supplied performance counters References: <1389916434-2288-1-git-send-email-cody@linux.vnet.ibm.com> <1390354379.11104.3.camel@concordia> In-Reply-To: <1390354379.11104.3.camel@concordia> Content-Type: text/plain; charset=ISO-8859-1 Cc: Peter Zijlstra , Linux PPC , LKML , Ingo Molnar , Paul Mackerras , Arnaldo Carvalho de Melo , Cody P Schafer List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On 01/22/2014 07:02 AM, Michael Ellerman wrote: > On Thu, 2014-01-16 at 15:53 -0800, Cody P Schafer wrote: >> These patches add basic pmus for 2 powerpc hypervisor interfaces to obtain >> performance counters: gpci ("get performance counter info") and 24x7. >> >> The counters supplied by these interfaces are continually counting and never >> need to be (and cannot be) disabled or enabled. They additionally do not >> generate any interrupts. This makes them in some regards similar to software >> counters, and as a result their implimentation shares some common code (which >> an initial patch exposes) with the sw counters. > > Hi Cody, > > Can you please add some more explanation of this series. > > In particular why do we need two new PMUs, and how do they relate to each > other? > > And can you add an example of how I'd actually use them using perf. > Yeah, agreed. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754764AbaAVJiu (ORCPT ); Wed, 22 Jan 2014 04:38:50 -0500 Received: from e23smtp01.au.ibm.com ([202.81.31.143]:50566 "EHLO e23smtp01.au.ibm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753568AbaAVJiq (ORCPT ); Wed, 22 Jan 2014 04:38:46 -0500 Message-ID: <52DF914B.2060308@linux.vnet.ibm.com> Date: Wed, 22 Jan 2014 15:07:15 +0530 From: Anshuman Khandual User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/17.0 Thunderbird/17.0 MIME-Version: 1.0 To: Michael Ellerman CC: Cody P Schafer , Peter Zijlstra , LKML , Ingo Molnar , Paul Mackerras , Arnaldo Carvalho de Melo , Linux PPC Subject: Re: [PATCH 0/8] Add support for PowerPC Hypervisor supplied performance counters References: <1389916434-2288-1-git-send-email-cody@linux.vnet.ibm.com> <1390354379.11104.3.camel@concordia> In-Reply-To: <1390354379.11104.3.camel@concordia> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 14012209-1618-0000-0000-0000054CD917 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 01/22/2014 07:02 AM, Michael Ellerman wrote: > On Thu, 2014-01-16 at 15:53 -0800, Cody P Schafer wrote: >> These patches add basic pmus for 2 powerpc hypervisor interfaces to obtain >> performance counters: gpci ("get performance counter info") and 24x7. >> >> The counters supplied by these interfaces are continually counting and never >> need to be (and cannot be) disabled or enabled. They additionally do not >> generate any interrupts. This makes them in some regards similar to software >> counters, and as a result their implimentation shares some common code (which >> an initial patch exposes) with the sw counters. > > Hi Cody, > > Can you please add some more explanation of this series. > > In particular why do we need two new PMUs, and how do they relate to each > other? > > And can you add an example of how I'd actually use them using perf. > Yeah, agreed.