[U-Boot] [PATCH 3/8] Tegra124: Add SPL/AVP (arm720t) cpu files

[Stephen Warren <swarren@wwwdotorg.org>]

On 10/08/2013 02:13 AM, Thierry Reding wrote:
> On Tue, Oct 08, 2013 at 12:42:53AM +0200, Tom Warren wrote:
>> This provides SPL support for T124 boards - AVP
>> early init, plus CPU (A15) init/jump to main U-Boot.

>> +#if defined(CONFIG_TEGRA124)
>> +       struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
>> +
>> +       /* Disable IDDQ */
>> +       reg = readl(&clkrst->crc_pllx_misc3);
>> +       reg &= ~PLLX_IDDQ_MASK;
>> +       writel(reg, &clkrst->crc_pllx_misc3);
>> +       udelay(2);
>> +       debug("%s: IDDQ: PLLX IDDQ = 0x%08X\n", __func__,
>> +             readl(&clkrst->crc_pllx_misc3));
>> +#endif /* T124 */
> 
> Perhaps this should be moved to a separate function that can be provided
> as a dummy for non-Tegra124?

(I'm working on finalizing this patch for submission now)

I think it's fine for the core driver to know about the different SoCs.
A simple ifdef like this is quite manageable. If the code starts to get
unmanageable, or does a lot of things that aren't common across chips,
we can always split it out into the SoC-specific files.

>> +void pmic_enable_cpu_vdd(void);
> 
> This doesn't seem to exist until patch 8. Perhaps this should really be
> an weak function so that it always exists but can still be overwritten
> by individual boards?

The build of these files isn't enabled until the last patch anyway, so
it's all perfectly bisectable. I'm not included to do anything to fix
this unless you feel strongly..

I'll fix up all the other issues you mentioned.