From mboxrd@z Thu Jan 1 00:00:00 1970 From: Waiman Long Subject: Re: [PATCH v10 1/4] qrwlock: A queue read/write lock implementation Date: Thu, 23 Jan 2014 12:47:20 -0500 Message-ID: <52E155A8.7000206@hp.com> References: <1390426438-31252-1-git-send-email-Waiman.Long@hp.com> <1390426438-31252-2-git-send-email-Waiman.Long@hp.com> <20140123100751.GS30183@twins.programming.kicks-ass.net> <52E14D67.4000202@hp.com> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: Sender: linux-kernel-owner@vger.kernel.org To: Linus Torvalds Cc: Peter Zijlstra , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , Arnd Bergmann , "linux-arch@vger.kernel.org" , the arch/x86 maintainers , Linux Kernel Mailing List , Steven Rostedt , Andrew Morton , Michel Lespinasse , Andi Kleen , Rik van Riel , "Paul E. McKenney" , Raghavendra K T , George Spelvin , Tim Chen , "Chandramouleeswaran, Aswin" , Scott J Norton List-Id: linux-arch.vger.kernel.org On 01/23/2014 12:15 PM, Linus Torvalds wrote: > On Thu, Jan 23, 2014 at 9:12 AM, Waiman Long wrote: >> I thought that all atomic RMW instructions are memory barrier. > On x86 they are. Not necessarily elsewhere. > >> If they are not, what kind of barrier should be added? > smp_mb__before_atomic_xyz() and smp_mb__after_atomic_xyz() will do it, > and are no-op (well, barriers - I don't think it matters) on x86. > > Linus > - Thank for the info. I am less familiar with that kind of issues on other architecture. I will add a smp_mb__after_atomic_dec() & send out a new patch. -Longman