Re: Arndale Timer Interrupt Question

[Tomasz Figa <t.figa@samsung.com>]

On 23.01.2014 07:10, Mj Embd wrote:
> On 1/10/14, Tomasz Figa <t.figa@samsung.com> wrote:
>> Hi,
>>
>> On 09.01.2014 13:52, Bartlomiej Zolnierkiewicz wrote:
>>>
>>> added linux-samsung-soc to cc:,
>>> it is a better suited list for this question
>>>
>>> On Thursday, January 09, 2014 10:30:56 AM Mj Embd wrote:
>>>> I am a bit confused on the interrupt number for CNTVIRQ..CNTHPIRQ. Can
>>>> you please help here.
>>>>
>>>> As per the exynos5 public manual
>>>> What is the difference between  CPU_nCNTHPIRQ[0] and CNTHPIRQ.
>>
>> I'm not sure if this is really what I think it is, but looking at the
>> manual, CPU_nCNTHPIRQ[0] and [1] SPI ports and CNTHPIRQ PPI port seem to
>> be the same signals, with the difference that the first two are shared
>> interrupts connected through the combiner, while the last one is a
>> per-processor interrupt, directly connected to GIC PPI port, allowing
>> each CPU to get its own CNTHPIRQ signal ([0] for CPU 0 and [1] for CPU 1).
>
> So while registering the IRQ which one has to be used Core0:26/33 Core1:26/54 ?

Well, it depends on your driver. If it supports per-CPU interrupts then 
you use CNTHPIRQ PPI port, othwerise nCNTHPIRQ[0] and [1] SPI ports.

Best regards,
Tomasz