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Date: Tue, 28 Jan 2014 09:34:45 -0800
From: Richard Henderson <rth@twiddle.net>
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Subject: Re: [Qemu-devel] [PATCH 15/21] target-arm: A64: Add SIMD simple 64
 bit insns from scalar 2-reg misc
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To: Peter Maydell <peter.maydell@linaro.org>, qemu-devel@nongnu.org
Cc: Peter Crosthwaite <peter.crosthwaite@xilinx.com>, patches@linaro.org, Michael Matz <matz@suse.de>, Alexander Graf <agraf@suse.de>, Claudio Fontana <claudio.fontana@linaro.org>, Dirk Mueller <dmueller@suse.de>, Will Newton <will.newton@linaro.org>, Laurent Desnogues <laurent.desnogues@gmail.com>, =?ISO-8859-1?Q?Alex_Benn=E9e?= <alex.bennee@linaro.org>, kvmarm@lists.cs.columbia.edu, Christoffer Dall <christoffer.dall@linaro.org>

On 01/26/2014 11:25 AM, Peter Maydell wrote:
> +    do_cmop:
> +        tcg_gen_setcondi_i64(tcg_invert_cond(cond), tcg_rd, tcg_rn, 0);
> +        tcg_gen_subi_i64(tcg_rd, tcg_rd, 1);
> +        break;

Another instance of (!test - 1) instead of -(test).

Otherwise,

Reviewed-by: Richard Henderson <rth@twiddle.net>


r~