From: Julien Grall <julien.grall@linaro.org>
To: Oleksandr Tyshchenko <oleksandr.tyshchenko@globallogic.com>
Cc: Stefano Stabellini <stefano.stabellini@eu.citrix.com>,
Ian Campbell <ian.campbell@citrix.com>,
xen-devel@lists.xen.org
Subject: Re: [PATCH v1 0/2] xen/arm: maintenance_interrupt SMP fix
Date: Wed, 29 Jan 2014 13:12:05 +0000 [thread overview]
Message-ID: <52E8FE25.1050108@linaro.org> (raw)
In-Reply-To: <CAJEb2DF+qVcvAeOpQUOSoBy_T3iri_MiXkcXFXFdDj916k9ThQ@mail.gmail.com>
Hello Oleksandr,
On 28/01/14 19:25, Oleksandr Tyshchenko wrote:
[..]
>
> Do you pass-through PPIs to dom0?
>
> If I understand correctly that PPIs is irqs from 16 to 31.
> So yes, I do. I see timer's irqs and maintenance irq which routed to
> both CPUs.
This IRQs are used by Xen, therefore they are emulated for dom0 and
domU. Xen won't EOI in maintenance_interrupt theses IRQs.
>
> And I have printed all irqs which fall to gic_route_irq_to_guest and
> gic_route_irq functions.
> ...
> (XEN) GIC initialization:
> (XEN) gic_dist_addr=0000000048211000
> (XEN) gic_cpu_addr=0000000048212000
> (XEN) gic_hyp_addr=0000000048214000
> (XEN) gic_vcpu_addr=0000000048216000
> (XEN) gic_maintenance_irq=25
> (XEN) GIC: 192 lines, 2 cpus, secure (IID 0000043b).
> (XEN)
> (XEN) >>>>> gic_route_irq: irq: 25, cpu_mask: 00000001
> (XEN)
> (XEN) >>>>> gic_route_irq: irq: 30, cpu_mask: 00000001
> (XEN)
> (XEN) >>>>> gic_route_irq: irq: 26, cpu_mask: 00000001
> (XEN)
> (XEN) >>>>> gic_route_irq: irq: 27, cpu_mask: 00000001
> (XEN)
> (XEN) >>>>> gic_route_irq: irq: 104, cpu_mask: 00000001
> (XEN) Using scheduler: SMP Credit Scheduler (credit)
> (XEN) Allocated console ring of 16 KiB.
> (XEN) VFP implementer 0x41 architecture 4 part 0x30 variant 0xf rev 0x0
> (XEN) Bringing up CPU1
> (XEN)
> (XEN) >>>>> gic_route_irq: irq: 25, cpu_mask: 00000002
> (XEN)
> (XEN) >>>>> gic_route_irq: irq: 30, cpu_mask: 00000002
> (XEN)
> (XEN) >>>>> gic_route_irq: irq: 26, cpu_mask: 00000002
> (XEN)
> (XEN) >>>>> gic_route_irq: irq: 27, cpu_mask: 00000002
> (XEN) CPU 1 booted.
> (XEN) Brought up 2 CPUs
> (XEN) *** LOADING DOMAIN 0 ***
> (XEN) Populate P2M 0xc8000000->0xd0000000 (1:1 mapping for dom0)
> (XEN)
> (XEN) >>>>> gic_route_irq_to_guest: domid: 0, irq: 61, cpu: 0
[..]
> (XEN) >>>>> gic_route_irq_to_guest: domid: 1, irq: 61, cpu: 1
Not related to this patch series, but is it normal that you passthrough
the same interrupt both to dom0 and domU?
There is few other case like that.
--
Julien Grall
next prev parent reply other threads:[~2014-01-29 13:12 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-01-27 17:33 [PATCH v1 0/2] xen/arm: maintenance_interrupt SMP fix Oleksandr Tyshchenko
2014-01-27 17:33 ` [PATCH v1 1/2] xen/arm: Add return value to smp_call_function_interrupt function Oleksandr Tyshchenko
2014-01-27 18:28 ` Stefano Stabellini
2014-01-27 17:33 ` [PATCH v1 2/2] xen/arm: Fix deadlock in on_selected_cpus function Oleksandr Tyshchenko
2014-01-27 19:00 ` Stefano Stabellini
2014-01-28 10:03 ` Ian Campbell
2014-01-28 14:00 ` Stefano Stabellini
2014-01-28 15:05 ` Ian Campbell
2014-01-28 16:02 ` Stefano Stabellini
2014-01-28 16:12 ` Ian Campbell
2014-01-28 16:23 ` Stefano Stabellini
2014-01-28 13:58 ` Stefano Stabellini
2014-01-30 11:58 ` Oleksandr Tyshchenko
2014-01-27 17:40 ` [PATCH v1 0/2] xen/arm: maintenance_interrupt SMP fix Ian Campbell
2014-01-27 17:51 ` Julien Grall
2014-01-28 19:25 ` Oleksandr Tyshchenko
2014-01-29 10:56 ` Oleksandr Tyshchenko
2014-01-29 11:42 ` Stefano Stabellini
2014-01-29 11:46 ` Stefano Stabellini
2014-01-29 13:15 ` Julien Grall
2014-02-04 15:32 ` Julien Grall
2014-02-04 16:20 ` [PATCH] xen/arm: route irqs to cpu0 Stefano Stabellini
2014-02-04 16:32 ` Julien Grall
2014-02-04 16:56 ` Oleksandr Tyshchenko
2014-02-19 13:43 ` Julien Grall
2014-02-19 13:53 ` Ian Campbell
2014-02-19 14:15 ` George Dunlap
2014-02-20 14:52 ` Stefano Stabellini
2014-02-21 11:12 ` George Dunlap
2014-02-21 11:59 ` Julien Grall
2014-02-21 12:07 ` George Dunlap
2014-01-29 13:07 ` [PATCH v1 0/2] xen/arm: maintenance_interrupt SMP fix Julien Grall
2014-01-29 13:22 ` Stefano Stabellini
2014-01-29 18:40 ` Oleksandr Tyshchenko
2014-01-29 18:43 ` Oleksandr Tyshchenko
2014-01-29 18:49 ` Julien Grall
2014-01-29 19:54 ` Oleksandr Tyshchenko
2014-01-30 0:42 ` Julien Grall
2014-01-30 13:24 ` Stefano Stabellini
2014-01-30 15:06 ` Oleksandr Tyshchenko
2014-01-30 15:35 ` Stefano Stabellini
2014-01-30 16:10 ` Oleksandr Tyshchenko
2014-01-30 17:18 ` Stefano Stabellini
2014-01-30 19:54 ` Oleksandr Tyshchenko
2014-01-30 21:47 ` Julien Grall
2014-01-31 1:57 ` Oleksandr Tyshchenko
2014-01-29 13:12 ` Julien Grall [this message]
2014-01-29 18:55 ` Oleksandr Tyshchenko
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