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diff for duplicates of <52EAF1CA.3040702@ti.com>

diff --git a/a/1.txt b/N1/1.txt
index 54de3fb..2946b06 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -89,9 +89,9 @@ definition remain constant.
 
 That said -> consider the following usecase: AM335x, OMAP3,4... (i
 will use omap4 as an example)
-MPU@300MHz and bus (on which LPDDR2 memory is) at 100MHz
+MPU at 300MHz and bus (on which LPDDR2 memory is) at 100MHz
 AND
-MPU@300MHz and bus (on which LPDDR2 memory is) at 200MHz
+MPU at 300MHz and bus (on which LPDDR2 memory is) at 200MHz
 
 are both valid with different memory access latencies. tying it down
 to OPP for MPU is just plain wrong - as it ignores other factors.
diff --git a/a/content_digest b/N1/content_digest
index f84017d..fd0647e 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,22 +1,8 @@
  "ref\052EA570A.8040501@arm.com\0"
- "From\0Nishanth Menon <nm@ti.com>\0"
- "Subject\0Re: Extending OPP bindings\0"
+ "From\0nm@ti.com (Nishanth Menon)\0"
+ "Subject\0Extending OPP bindings\0"
  "Date\0Thu, 30 Jan 2014 18:43:54 -0600\0"
- "To\0Sudeep Holla <Sudeep.Holla@arm.com>"
- " devicetree@vger.kernel.org <devicetree@vger.kernel.org>\0"
- "Cc\0linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org>"
-  linux-pm@vger.kernel.org <linux-pm@vger.kernel.org>
-  Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
-  Mark Rutland <mark.rutland@arm.com>
-  Charles Garcia-Tobin <Charles.Garcia-Tobin@arm.com>
-  Rob Herring <robh+dt@kernel.org>
-  grant.likely@linaro.org <grant.likely@linaro.org>
-  Morten Rasmussen <Morten.Rasmussen@arm.com>
-  Shawn Guo <shawn.guo@linaro.org>
-  mturquette@linaro.org <mturquette@linaro.org>
-  Mark Brown <mark.brown@linaro.org>
-  Eduardo Valentin <eduardo.valentin@ti.com>
- " Sudeep KarkadaNagesha <Sudeep.KarkadaNagesha@arm.com>\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "Hi Sudeep,\n"
@@ -110,9 +96,9 @@
  "\n"
  "That said -> consider the following usecase: AM335x, OMAP3,4... (i\n"
  "will use omap4 as an example)\n"
- "MPU@300MHz and bus (on which LPDDR2 memory is) at 100MHz\n"
+ "MPU at 300MHz and bus (on which LPDDR2 memory is) at 100MHz\n"
  "AND\n"
- "MPU@300MHz and bus (on which LPDDR2 memory is) at 200MHz\n"
+ "MPU at 300MHz and bus (on which LPDDR2 memory is) at 200MHz\n"
  "\n"
  "are both valid with different memory access latencies. tying it down\n"
  "to OPP for MPU is just plain wrong - as it ignores other factors.\n"
@@ -162,4 +148,4 @@
  "Regards,\n"
  Nishanth Menon
 
-1323294a8890b9c070d156b57036853690b7c8913482e556ab05e74915951f9e
+c5f63647d65eab522f0aca38e2ff19e20e139117480f11c39d746580c814e217

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