diff for duplicates of <52EB9C03.70009@st.com> diff --git a/a/1.txt b/N1/1.txt index 62b9219..e7dbffb 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -59,7 +59,7 @@ s/boxe/box/ > + * Bootloader initialized system infrastructure clock for > + * serial devices. > + */ -> + CLK_IC_LP_HD: clockgenA0 at 29 { +> + CLK_IC_LP_HD: clockgenA0@29 { > + #clock-cells = <0>; > + compatible = "fixed-clock"; > + clock-frequency = <100000000>; @@ -131,7 +131,7 @@ Patches are in : https://lkml.org/lkml/2014/1/16/342 All these patches are due to be in v3.15. > + -> + PIO0: gpio at febe0000 { +> + PIO0: gpio@febe0000 { > + gpio-controller; > + #gpio-cells = <1>; > + reg = <0 0x100>; @@ -175,19 +175,19 @@ s/publishhed/published/ > + #address-cells = <1>; > + #size-cells = <0>; > + -> + cpu at 0 { +> + cpu@0 { > + device_type = "cpu"; > + compatible = "arm,cortex-a9"; > + reg = <0>; > + }; -> + cpu at 1 { +> + cpu@1 { > + device_type = "cpu"; > + compatible = "arm,cortex-a9"; > + reg = <1>; > + }; > + }; > + -> + intc: interrupt-controller at fffe1000 { +> + intc: interrupt-controller@fffe1000 { > + compatible = "arm,cortex-a9-gic"; > + #interrupt-cells = <3>; > + interrupt-controller; @@ -195,12 +195,12 @@ s/publishhed/published/ > + <0xfffe0100 0x100>; > + }; > + -> + scu at fffe0000 { +> + scu@fffe0000 { > + compatible = "arm,cortex-a9-scu"; > + reg = <0xfffe0000 0x1000>; > + }; > + -> + timer at fffe0200 { +> + timer@fffe0200 { > + interrupt-parent = <&intc>; > + compatible = "arm,cortex-a9-global-timer"; > + reg = <0xfffe0200 0x100>; diff --git a/a/content_digest b/N1/content_digest index 479e605..db5bb9c 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,9 +1,21 @@ "ref\01391093744-19905-1-git-send-email-patrice.chotard@st.com\0" "ref\01391093744-19905-4-git-send-email-patrice.chotard@st.com\0" - "From\0srinivas.kandagatla@st.com (srinivas kandagatla)\0" - "Subject\0[PATCH 3/4] ARM: dts: Add support of STid127 Soc.\0" + "From\0srinivas kandagatla <srinivas.kandagatla@st.com>\0" + "Subject\0Re: [PATCH 3/4] ARM: dts: Add support of STid127 Soc.\0" "Date\0Fri, 31 Jan 2014 12:50:11 +0000\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Patrice CHOTARD <patrice.chotard@st.com>" + Stuart Menefy <stuart.menefy@st.com> + Russell King <linux@arm.linux.org.uk> + linux-arm-kernel@lists.infradead.org + kernel@stlinux.com + linux-kernel@vger.kernel.org + Linus Walleij <linus.walleij@linaro.org> + Grant Likely <grant.likely@linaro.org> + Rob Herring <robh+dt@kernel.org> + " devicetree@vger.kernel.org\0" + "Cc\0Giuseppe Cavallaro <peppe.cavallaro@st.com>" + alexandre.torgue@st.com + " maxime.coquelin@st.com\0" "\00:1\0" "b\0" "Hi Patrice,\n" @@ -67,7 +79,7 @@ "> +\t\t * Bootloader initialized system infrastructure clock for\n" "> +\t\t * serial devices.\n" "> +\t\t */\n" - "> +\t\tCLK_IC_LP_HD: clockgenA0 at 29 {\n" + "> +\t\tCLK_IC_LP_HD: clockgenA0@29 {\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\tcompatible = \"fixed-clock\";\n" "> +\t\t\tclock-frequency = <100000000>;\n" @@ -139,7 +151,7 @@ "All these patches are due to be in v3.15.\n" "\n" "> +\n" - "> +\t\t\tPIO0: gpio at febe0000 {\n" + "> +\t\t\tPIO0: gpio@febe0000 {\n" "> +\t\t\t\tgpio-controller;\n" "> +\t\t\t\t#gpio-cells = <1>;\n" "> +\t\t\t\treg = <0 0x100>;\n" @@ -183,19 +195,19 @@ "> +\t\t#address-cells = <1>;\n" "> +\t\t#size-cells = <0>;\n" "> +\n" - "> +\t\tcpu at 0 {\n" + "> +\t\tcpu@0 {\n" "> +\t\t\tdevice_type = \"cpu\";\n" "> +\t\t\tcompatible = \"arm,cortex-a9\";\n" "> +\t\t\treg = <0>;\n" "> +\t\t};\n" - "> +\t\tcpu at 1 {\n" + "> +\t\tcpu@1 {\n" "> +\t\t\tdevice_type = \"cpu\";\n" "> +\t\t\tcompatible = \"arm,cortex-a9\";\n" "> +\t\t\treg = <1>;\n" "> +\t\t};\n" "> +\t};\n" "> +\n" - "> +\tintc: interrupt-controller at fffe1000 {\n" + "> +\tintc: interrupt-controller@fffe1000 {\n" "> +\t\tcompatible = \"arm,cortex-a9-gic\";\n" "> +\t\t#interrupt-cells = <3>;\n" "> +\t\tinterrupt-controller;\n" @@ -203,12 +215,12 @@ "> +\t\t <0xfffe0100 0x100>;\n" "> +\t};\n" "> +\n" - "> +\tscu at fffe0000 {\n" + "> +\tscu@fffe0000 {\n" "> +\t\tcompatible = \"arm,cortex-a9-scu\";\n" "> +\t\treg = <0xfffe0000 0x1000>;\n" "> +\t};\n" "> +\n" - "> +\ttimer at fffe0200 {\n" + "> +\ttimer@fffe0200 {\n" "> +\t\t\tinterrupt-parent = <&intc>;\n" "> +\t\t\tcompatible = \"arm,cortex-a9-global-timer\";\n" "> +\t\t\treg = <0xfffe0200 0x100>;\n" @@ -221,4 +233,4 @@ "srini\n" > -b4adb91e913b91b3990a569e7851adf66e5a4a610b2ccd7ceb8b83682630edba +099704dea2278b5dab5b7e9ed01a2c6f692c06b4563827bf9c6248dcd777019c
diff --git a/a/1.txt b/N2/1.txt index 62b9219..e7dbffb 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -59,7 +59,7 @@ s/boxe/box/ > + * Bootloader initialized system infrastructure clock for > + * serial devices. > + */ -> + CLK_IC_LP_HD: clockgenA0 at 29 { +> + CLK_IC_LP_HD: clockgenA0@29 { > + #clock-cells = <0>; > + compatible = "fixed-clock"; > + clock-frequency = <100000000>; @@ -131,7 +131,7 @@ Patches are in : https://lkml.org/lkml/2014/1/16/342 All these patches are due to be in v3.15. > + -> + PIO0: gpio at febe0000 { +> + PIO0: gpio@febe0000 { > + gpio-controller; > + #gpio-cells = <1>; > + reg = <0 0x100>; @@ -175,19 +175,19 @@ s/publishhed/published/ > + #address-cells = <1>; > + #size-cells = <0>; > + -> + cpu at 0 { +> + cpu@0 { > + device_type = "cpu"; > + compatible = "arm,cortex-a9"; > + reg = <0>; > + }; -> + cpu at 1 { +> + cpu@1 { > + device_type = "cpu"; > + compatible = "arm,cortex-a9"; > + reg = <1>; > + }; > + }; > + -> + intc: interrupt-controller at fffe1000 { +> + intc: interrupt-controller@fffe1000 { > + compatible = "arm,cortex-a9-gic"; > + #interrupt-cells = <3>; > + interrupt-controller; @@ -195,12 +195,12 @@ s/publishhed/published/ > + <0xfffe0100 0x100>; > + }; > + -> + scu at fffe0000 { +> + scu@fffe0000 { > + compatible = "arm,cortex-a9-scu"; > + reg = <0xfffe0000 0x1000>; > + }; > + -> + timer at fffe0200 { +> + timer@fffe0200 { > + interrupt-parent = <&intc>; > + compatible = "arm,cortex-a9-global-timer"; > + reg = <0xfffe0200 0x100>; diff --git a/a/content_digest b/N2/content_digest index 479e605..64536b8 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,9 +1,21 @@ "ref\01391093744-19905-1-git-send-email-patrice.chotard@st.com\0" "ref\01391093744-19905-4-git-send-email-patrice.chotard@st.com\0" - "From\0srinivas.kandagatla@st.com (srinivas kandagatla)\0" - "Subject\0[PATCH 3/4] ARM: dts: Add support of STid127 Soc.\0" + "From\0srinivas kandagatla <srinivas.kandagatla@st.com>\0" + "Subject\0Re: [PATCH 3/4] ARM: dts: Add support of STid127 Soc.\0" "Date\0Fri, 31 Jan 2014 12:50:11 +0000\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Patrice CHOTARD <patrice.chotard@st.com>" + Stuart Menefy <stuart.menefy@st.com> + Russell King <linux@arm.linux.org.uk> + <linux-arm-kernel@lists.infradead.org> + <kernel@stlinux.com> + <linux-kernel@vger.kernel.org> + Linus Walleij <linus.walleij@linaro.org> + Grant Likely <grant.likely@linaro.org> + Rob Herring <robh+dt@kernel.org> + " <devicetree@vger.kernel.org>\0" + "Cc\0<maxime.coquelin@st.com>" + <alexandre.torgue@st.com> + " Giuseppe Cavallaro <peppe.cavallaro@st.com>\0" "\00:1\0" "b\0" "Hi Patrice,\n" @@ -67,7 +79,7 @@ "> +\t\t * Bootloader initialized system infrastructure clock for\n" "> +\t\t * serial devices.\n" "> +\t\t */\n" - "> +\t\tCLK_IC_LP_HD: clockgenA0 at 29 {\n" + "> +\t\tCLK_IC_LP_HD: clockgenA0@29 {\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\tcompatible = \"fixed-clock\";\n" "> +\t\t\tclock-frequency = <100000000>;\n" @@ -139,7 +151,7 @@ "All these patches are due to be in v3.15.\n" "\n" "> +\n" - "> +\t\t\tPIO0: gpio at febe0000 {\n" + "> +\t\t\tPIO0: gpio@febe0000 {\n" "> +\t\t\t\tgpio-controller;\n" "> +\t\t\t\t#gpio-cells = <1>;\n" "> +\t\t\t\treg = <0 0x100>;\n" @@ -183,19 +195,19 @@ "> +\t\t#address-cells = <1>;\n" "> +\t\t#size-cells = <0>;\n" "> +\n" - "> +\t\tcpu at 0 {\n" + "> +\t\tcpu@0 {\n" "> +\t\t\tdevice_type = \"cpu\";\n" "> +\t\t\tcompatible = \"arm,cortex-a9\";\n" "> +\t\t\treg = <0>;\n" "> +\t\t};\n" - "> +\t\tcpu at 1 {\n" + "> +\t\tcpu@1 {\n" "> +\t\t\tdevice_type = \"cpu\";\n" "> +\t\t\tcompatible = \"arm,cortex-a9\";\n" "> +\t\t\treg = <1>;\n" "> +\t\t};\n" "> +\t};\n" "> +\n" - "> +\tintc: interrupt-controller at fffe1000 {\n" + "> +\tintc: interrupt-controller@fffe1000 {\n" "> +\t\tcompatible = \"arm,cortex-a9-gic\";\n" "> +\t\t#interrupt-cells = <3>;\n" "> +\t\tinterrupt-controller;\n" @@ -203,12 +215,12 @@ "> +\t\t <0xfffe0100 0x100>;\n" "> +\t};\n" "> +\n" - "> +\tscu at fffe0000 {\n" + "> +\tscu@fffe0000 {\n" "> +\t\tcompatible = \"arm,cortex-a9-scu\";\n" "> +\t\treg = <0xfffe0000 0x1000>;\n" "> +\t};\n" "> +\n" - "> +\ttimer at fffe0200 {\n" + "> +\ttimer@fffe0200 {\n" "> +\t\t\tinterrupt-parent = <&intc>;\n" "> +\t\t\tcompatible = \"arm,cortex-a9-global-timer\";\n" "> +\t\t\treg = <0xfffe0200 0x100>;\n" @@ -221,4 +233,4 @@ "srini\n" > -b4adb91e913b91b3990a569e7851adf66e5a4a610b2ccd7ceb8b83682630edba +8b6dd0f6d3f94ca7c626d4de0814299bad67954e0b533b2aefc108d8fe555a02
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