From: David Hawkins <dwh@ovro.caltech.edu>
To: Michael Moese <michael.moese@men.de>
Cc: linuxppc-dev@lists.ozlabs.org
Subject: Re: PCIe Access - achieve bursts without DMA
Date: Mon, 03 Feb 2014 09:08:54 -0800 [thread overview]
Message-ID: <52EFCD26.5070702@ovro.caltech.edu> (raw)
In-Reply-To: <20140203082050.GB1970@localhost.intra.men.de>
Hi Michael,
> On Fri, Jan 31, 2014 at 03:18:30PM -0800, David Hawkins wrote:
>> 1. Peripheral board DMA (board-to-board)
>> 2. Peripheral board DMA to host memory.
>> 3. Host (root complex) DMA.
>>
>> As far as "verification" of your custom peripheral board FPGA IP is
>> concerned, if I was a customer, and you had data for (1) and (2),
>> I'd be pretty happy (and could care less about (2), since its so
>> system dependent).
>
> Usually I would totally agree with you and try to implement the benchmark
> using DMA transfers Unfortunately, we have some boards and IP cores that
> do not support DMA transfers, or the target system must not do by a
> requirement, and as I have no influence on these, I had to investigate
> on how to improve my throughput.
Ah, I see, that does make your life difficult then.
> I've submitted a RFC Patch earlier today, which allowed me to perform
> PCIe read bursts on IO memory, achieving 18 MB/s instead of the 3 MB/s
> I got when using non-cached reads. However, I had to ioremap() my
> memory, like Gabriel said, using write-thru configuration.
That sounds like a reasonable compromise.
Cheers,
Dave
prev parent reply other threads:[~2014-02-03 17:08 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-01-30 12:20 PCIe Access - achieve bursts without DMA Moese, Michael
2014-01-30 14:19 ` David Laight
2014-01-31 12:31 ` Gabriel Paubert
2014-01-31 22:53 ` Benjamin Herrenschmidt
2014-01-31 23:18 ` David Hawkins
2014-02-03 8:20 ` Michael Moese
2014-02-03 10:17 ` David Laight
2014-02-03 10:39 ` Michael Moese
2014-02-03 10:51 ` David Laight
2014-02-03 17:08 ` David Hawkins [this message]
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