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diff for duplicates of <52F782AA.5010207@redhat.com>

diff --git a/a/1.txt b/N1/1.txt
index 5d7e3c4..bcf09db 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,7 +1,7 @@
 Hi,
 
 On 02/08/2014 05:32 AM, Chen-Yu Tsai wrote:
-> On Sat, Feb 8, 2014 at 12:33 AM, Hans de Goede <hdegoede@redhat.com> wrote:
+> On Sat, Feb 8, 2014 at 12:33 AM, Hans de Goede <hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org> wrote:
 >> The Allwinner A1x / A2x SoCs have 2 or 3 usb phys which are all accessed
 >> through a single set of registers. Besides this there are also some other
 >> phy related bits which need poking, which are per phy, but shared between the
diff --git a/a/content_digest b/N1/content_digest
index 81282b1..bf15b29 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,15 +1,20 @@
  "ref\01391790801-27864-1-git-send-email-hdegoede@redhat.com\0"
  "ref\0CAGb2v67L1X63Pp10H6MFApkLzCvwOokxSW+fH6KquDnqaRGRmQ@mail.gmail.com\0"
- "From\0hdegoede@redhat.com (Hans de Goede)\0"
- "Subject\0[linux-sunxi] [PATCH v2] ARM: sunxi: Add driver for sunxi usb phy\0"
+ "ref\0CAGb2v67L1X63Pp10H6MFApkLzCvwOokxSW+fH6KquDnqaRGRmQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org\0"
+ "From\0Hans de Goede <hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>\0"
+ "Subject\0Re: [PATCH v2] ARM: sunxi: Add driver for sunxi usb phy\0"
  "Date\0Sun, 09 Feb 2014 14:29:14 +0100\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org\0"
+ "Cc\0Kishon Vijay Abraham I <kishon-l0cyMroinI0@public.gmane.org>"
+  Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
+  linux-arm-kernel <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>
+ " devicetree <devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>\0"
  "\00:1\0"
  "b\0"
  "Hi,\n"
  "\n"
  "On 02/08/2014 05:32 AM, Chen-Yu Tsai wrote:\n"
- "> On Sat, Feb 8, 2014 at 12:33 AM, Hans de Goede <hdegoede@redhat.com> wrote:\n"
+ "> On Sat, Feb 8, 2014 at 12:33 AM, Hans de Goede <hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org> wrote:\n"
  ">> The Allwinner A1x / A2x SoCs have 2 or 3 usb phys which are all accessed\n"
  ">> through a single set of registers. Besides this there are also some other\n"
  ">> phy related bits which need poking, which are per phy, but shared between the\n"
@@ -36,4 +41,4 @@
  "\n"
  Hans
 
-b3e46e66b983653b99df423878e0d8adb978c3c4a18cfcc22f0cba7f0112d9e6
+781412d8378a42a5440374a4a890be468add59f1e797369d0f2f41df51f494d4

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