From mboxrd@z Thu Jan 1 00:00:00 1970 From: Julien Grall Subject: Re: [RFC for-4.5 06/12] xen/passthrough: rework dom0_pvh_reqs to use it also on ARM Date: Mon, 10 Feb 2014 17:42:28 +0000 Message-ID: <52F90F84.2090506@linaro.org> References: <1391794991-5919-1-git-send-email-julien.grall@linaro.org> <1391794991-5919-7-git-send-email-julien.grall@linaro.org> <52F8F9F8.9000702@linaro.org> <52F90DF8020000780011AD65@nat28.tlf.novell.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail6.bemta14.messagelabs.com ([193.109.254.103]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1WCusN-0004xD-Hh for xen-devel@lists.xenproject.org; Mon, 10 Feb 2014 17:42:35 +0000 Received: by mail-ea0-f169.google.com with SMTP id h10so3210189eak.28 for ; Mon, 10 Feb 2014 09:42:33 -0800 (PST) In-Reply-To: <52F90DF8020000780011AD65@nat28.tlf.novell.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Jan Beulich Cc: ian.campbell@citrix.com, patches@linaro.org, tim@xen.org, stefano.stabellini@citrix.com, xen-devel@lists.xenproject.org, Xiantao Zhang List-Id: xen-devel@lists.xenproject.org On 02/10/2014 04:35 PM, Jan Beulich wrote: >>>> On 10.02.14 at 17:10, Julien Grall wrote: >> On 02/07/2014 05:43 PM, Julien Grall wrote: >>> DOM0 on ARM will have the same requirements as DOM0 PVH when iommu is >> enabled. >>> Both PVH and ARM guest has paging mode translate enabled, so Xen can use it >>> to know if it needs to check the requirements. >>> >>> Rename the function and remove "pvh" word in the commit message. >>> >>> Signed-off-by: Julien Grall >>> Cc: Xiantao Zhang >>> Cc: Jan Beulich >>> --- >>> xen/drivers/passthrough/iommu.c | 14 +++++++++----- >>> 1 file changed, 9 insertions(+), 5 deletions(-) >>> >>> diff --git a/xen/drivers/passthrough/iommu.c b/xen/drivers/passthrough/iommu.c >>> index 19b0e23..26a5d91 100644 >>> --- a/xen/drivers/passthrough/iommu.c >>> +++ b/xen/drivers/passthrough/iommu.c >>> @@ -130,13 +130,18 @@ int iommu_domain_init(struct domain *d) >>> return hd->platform_ops->init(d); >>> } >>> >>> -static __init void check_dom0_pvh_reqs(struct domain *d) >>> +static __init void check_dom0_reqs(struct domain *d) >>> { >>> + if ( !paging_mode_translate(d) ) >>> + return; >>> + >>> if ( !iommu_enabled ) >>> - panic("Presently, iommu must be enabled for pvh dom0\n"); >>> + panic("Presently, iommu must be enabled to use dom0 with translate >> " >>> + "paging mode\n"); >> >> Hmmm... this change is wrong. I forgot that iommu doesn't exist on some >> ARM platform (for instance Arndale). >> >> Do we really this check for PVH? If yes, I will add replace the check >> by: is_pvh_domain(d) && !iommu_enabled. > > Of course we need it: How would PVH Dom0 be able to do any kind > of DMA without an IOMMU? Right, on ARM we have the 1:1 memory mapping to avoid this issue. I will fix it. Can I keep your ack on this patch? > Jan > -- Julien Grall