Re: [Qemu-devel] [PATCH v2 1/4] target-mips: add CPU definition for MIPS32R5

["Andreas Färber" <afaerber@suse.de>]

Am 13.02.2014 15:51, schrieb Peter Maydell:
> On 10 February 2014 15:42, Peter Maydell <peter.maydell@linaro.org> wrote:
>> On 10 February 2014 13:51, Andreas Färber <afaerber@suse.de> wrote:
>>> Am 24.01.2014 17:18, schrieb Petar Jovanovic:
>>>> From: Petar Jovanovic <petar.jovanovic@imgtec.com>
>>>> --- a/target-mips/translate_init.c
>>>> +++ b/target-mips/translate_init.c
>>>> @@ -333,6 +333,31 @@ static const mips_def_t mips_defs[] =
>>>>          .insn_flags = CPU_MIPS32R2 | ASE_MIPS16 | ASE_DSP | ASE_DSPR2,
>>>>          .mmu_type = MMU_TYPE_R4000,
>>>>      },
>>>> +    {
>>>> +        /* A generic CPU providing MIPS32 Release 5 features.
>>>> +           FIXME: Eventually this should be replaced by a real CPU model. */
>>>
>>> That is not really possible. QEMU needs to keep command line backwards
>>> compatibility, so if you add a generic model now, we will need to live
>>> with the generic model for a long time. What's the difficulty with
>>> taking "a real CPU model"? Is there no silicon yet or just a code name
>>> rather than a marketing name?
>>
>> Good point, though I notice we have two MIPS CPUs already
>> with this same 'FIXME' comment about being generic.
> 
> So before I apply the pull request with this patch, does
> anybody want to actually object to adding another 'generic'
> MIPS CPU to the two we have already? It seems reasonable
> enough to me.

No objection from my side. I was however expecting Petar to drop the
FIXME in response to my reply, which I believe was still in the PULL.

Peter, are you planning (or did I miss) a follow-up cleaning that up,
whether for your new model or for all?

Regards,
Andreas

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