From: "Sagar, Vishal" <vishal.sagar@amd.com>
To: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>,
Anatoliy Klymenko <anatoliy.klymenko@amd.com>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
Michal Simek <michal.simek@amd.com>
Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Geert Uytterhoeven <geert@linux-m68k.org>,
Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>,
Pekka Paalanen <ppaalanen@gmail.com>,
Dmitry Baryshkov <lumag@kernel.org>
Subject: Re: [PATCH v5 03/11] drm/fourcc: Add DRM_FORMAT_Y8
Date: Wed, 3 Sep 2025 15:59:20 +0200 [thread overview]
Message-ID: <52c7e4b4-6531-4268-a867-78b434fed9d3@amd.com> (raw)
In-Reply-To: <20250425-xilinx-formats-v5-3-c74263231630@ideasonboard.com>
Hi Tomi,
Thanks for the patch.
On 4/25/2025 1:01 PM, Tomi Valkeinen wrote:
> Add greyscale Y8 format.
>
> Acked-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
> ---
> drivers/gpu/drm/drm_fourcc.c | 1 +
> include/uapi/drm/drm_fourcc.h | 10 ++++++++++
> 2 files changed, 11 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c
> index e101d1b99aeb..355aaf7b5e9e 100644
> --- a/drivers/gpu/drm/drm_fourcc.c
> +++ b/drivers/gpu/drm/drm_fourcc.c
> @@ -267,6 +267,7 @@ const struct drm_format_info *__drm_format_info(u32 format)
> { .format = DRM_FORMAT_YVU422, .depth = 0, .num_planes = 3, .cpp = { 1, 1, 1 }, .hsub = 2, .vsub = 1, .is_yuv = true },
> { .format = DRM_FORMAT_YUV444, .depth = 0, .num_planes = 3, .cpp = { 1, 1, 1 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> { .format = DRM_FORMAT_YVU444, .depth = 0, .num_planes = 3, .cpp = { 1, 1, 1 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> + { .format = DRM_FORMAT_Y8, .depth = 8, .num_planes = 1, .cpp = { 1, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> { .format = DRM_FORMAT_NV12, .depth = 0, .num_planes = 2, .cpp = { 1, 2, 0 }, .hsub = 2, .vsub = 2, .is_yuv = true },
> { .format = DRM_FORMAT_NV21, .depth = 0, .num_planes = 2, .cpp = { 1, 2, 0 }, .hsub = 2, .vsub = 2, .is_yuv = true },
> { .format = DRM_FORMAT_NV16, .depth = 0, .num_planes = 2, .cpp = { 1, 2, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
> index 1247b814bd66..5af64a683dd7 100644
> --- a/include/uapi/drm/drm_fourcc.h
> +++ b/include/uapi/drm/drm_fourcc.h
> @@ -405,6 +405,16 @@ extern "C" {
> #define DRM_FORMAT_YUV444 fourcc_code('Y', 'U', '2', '4') /* non-subsampled Cb (1) and Cr (2) planes */
> #define DRM_FORMAT_YVU444 fourcc_code('Y', 'V', '2', '4') /* non-subsampled Cr (1) and Cb (2) planes */
>
> +/*
> + * Y-only (greyscale) formats
> + *
> + * The Y-only formats are handled similarly to the YCbCr formats in the display
> + * pipeline, with the Cb and Cr implicitly neutral (0.0 in nominal values). This
> + * also means that COLOR_RANGE property applies to the Y-only formats.
> + *
> + */
> +
> +#define DRM_FORMAT_Y8 fourcc_code('G', 'R', 'E', 'Y') /* 8-bit Y-only */
>
> /*
> * Format Modifiers:
>
Feel free to add -
Reviewed-by: Vishal Sagar <vishal.sagar@amd.com>
Regards
Vishal Sagar
next prev parent reply other threads:[~2025-09-03 18:20 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-25 11:01 [PATCH v5 00/11] drm: Add new pixel formats for Xilinx Zynqmp Tomi Valkeinen
2025-04-25 11:01 ` [PATCH v5 01/11] drm/fourcc: Add warning for bad bpp Tomi Valkeinen
2025-04-25 11:01 ` [PATCH v5 02/11] drm/fourcc: Add DRM_FORMAT_XV15/XV20 Tomi Valkeinen
2025-09-03 13:59 ` Sagar, Vishal
2025-04-25 11:01 ` [PATCH v5 03/11] drm/fourcc: Add DRM_FORMAT_Y8 Tomi Valkeinen
2025-04-25 11:59 ` Pekka Paalanen
2025-09-03 13:59 ` Sagar, Vishal [this message]
2025-04-25 11:01 ` [PATCH v5 04/11] drm/fourcc: Add DRM_FORMAT_Y10_P32 Tomi Valkeinen
2025-09-03 13:59 ` Sagar, Vishal
2025-04-25 11:01 ` [PATCH v5 05/11] drm/fourcc: Add DRM_FORMAT_X403 Tomi Valkeinen
2025-04-26 2:14 ` Dmitry Baryshkov
2025-09-03 13:59 ` Sagar, Vishal
2025-04-25 11:01 ` [PATCH v5 06/11] drm/fourcc: Add DRM_FORMAT_XVUY2101010 Tomi Valkeinen
2025-09-03 14:00 ` Sagar, Vishal
2025-04-25 11:01 ` [PATCH v5 07/11] drm: xlnx: zynqmp: Use drm helpers when calculating buffer sizes Tomi Valkeinen
2025-04-25 11:01 ` [PATCH v5 08/11] drm: xlnx: zynqmp: Add support for XV15 & XV20 Tomi Valkeinen
2025-09-03 14:00 ` Sagar, Vishal
2025-04-25 11:01 ` [PATCH v5 09/11] drm: xlnx: zynqmp: Add support for Y8 and Y10_P32 Tomi Valkeinen
2025-09-03 14:01 ` Sagar, Vishal
2025-04-25 11:01 ` [PATCH v5 10/11] drm: xlnx: zynqmp: Add support for X403 Tomi Valkeinen
2025-09-03 14:01 ` Sagar, Vishal
2025-04-25 11:01 ` [PATCH v5 11/11] drm: xlnx: zynqmp: Add support for XVUY2101010 Tomi Valkeinen
2025-09-03 14:01 ` Sagar, Vishal
2025-08-08 11:15 ` [PATCH v5 00/11] drm: Add new pixel formats for Xilinx Zynqmp Tomi Valkeinen
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